CY7C129 Просмотр технического описания (PDF) - Cypress Semiconductor
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CY7C129 Datasheet PDF : 8 Pages
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Item
2.
3.
Issue
O/P Buffer enters a locked up unde-
fined state after controls or clocks are
left floating. No proper read/write
access can be done on the device
until a dummy read is performed.
The EXTEST function in the JTAG
test fails when input K clock is floating
in the JTAG mode.
Device
9Mb - “D” Rev - Ram9
18Mb - “B” Rev - Ram9
36Mb - “A” Rev - Ram9
72Mb - Ram9
QDR-I/DDR-I/
QDR-II/DDR-II Devices
9Mb - “D” Rev - Ram9
18Mb - “B” Rev - Ram9
36Mb - “A” Rev - Ram9
72Mb - Ram9
QDR-I/DDR-I/
QDR-II/DDR-II Devices
Fix Status
The fix has been implemented on
the new revision and is now avail-
able.
The fix involved bypassing the ZQ
circuitry in JTAG mode. This was
done by overriding the ZQ circuit-
ry by the JTAG signal. The fix has
been implemented on the new re-
vision and is now available.
Table 2. Issue Definition and fix status for different devices
1. DOFF Pin Issue
• ISSUE DEFINITION
This issue involves the DLL not turning ON properly if a large resistor is used (eg:-10K Ω ) as an external pullup
resistor to enable the DLL. If a 10K Ω or higher pullup resistor is used externally, the voltage on DOFF is not
high enough to enable the DLL.
• PARAMETERS AFFECTED
The functionality of the device will be affected because of the DLL is not turning ON properly. When the DLL
is enabled, all AC and DC parameters on the datasheet are met.
• TRIGGER CONDITION(S)
Having a 10K Ω or higher external pullup resistor for disabling the DOFF pin.
• SCOPE OF IMPACT
This issue will alter the normal functionality of the QDRII/DDRII devices when the DLL is disabled.
• EXPLANATION OF ISSUE
Figure 1 shows the DOFF pin circuit with an internal 5K Ω internal resistor. The fix planned is to disable the
internal 5K Ω leaker.
Figure 1. DOFF pin with the 5K Ω internal resistor
• WORKAROUND
Document #: 001-06217 Rev. *C
Page 2 of 8
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