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CY7C026AV-25AXC Просмотр технического описания (PDF) - Cypress Semiconductor

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CY7C026AV-25AXC
Cypress
Cypress Semiconductor Cypress
CY7C026AV-25AXC Datasheet PDF : 19 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
CY7C024AV/024BV/025AV/026AV
CY7C0241AV/0251AV/036AV
Switching Characteristics
Over the Operating Range (continued)[20]
Parameter
Description
tPWE
tSD
tHD
tHZWE[23, 24]
tLZWE[23, 24]
tWDD[25]
tDDD[25]
Busy Timing[26]
Write Pulse Width
Data Setup to Write End
Data Hold From Write End
R/W LOW to High Z
R/W HIGH to Low Z
Write Pulse to Data Delay
Write Data Valid to Read Data Valid
tBLA
BUSY LOW from Address Match
tBHA
BUSY HIGH from Address Mismatch
tBLC
BUSY LOW from CE LOW
tBHC
BUSY HIGH from CE HIGH
tPS
Port Setup for Priority
tWB
R/W HIGH after BUSY (Slave)
tWH
R/W HIGH after BUSY HIGH (Slave)
tBDD[27]
BUSY HIGH to Data Valid
Interrupt Timing[26]
tINS
INT Set Time
tINR
INT Reset Time
Semaphore Timing
tSOP
tSWRD
tSPS
tSAA
SEM Flag Update Pulse (OE or SEM)
SEM Flag Write to Read Time
SEM Flag Contention Window
SEM Address Access Time
CY7C024AV/024BV/025AV/026AV
CY7C0241AV/0251AV/036AV
-20
-25
Unit
Min
Max
Min
Max
15
20
ns
15
15
ns
0
0
ns
12
15
ns
3
0
ns
45
50
ns
30
35
ns
20
20
ns
20
20
ns
20
20
ns
17
17
ns
5
5
ns
0
0
ns
15
17
ns
20
25
ns
20
20
ns
20
20
ns
10
12
ns
5
5
ns
5
5
ns
20
25
ns
Data Retention Mode
Timing
The
CY7C024AV/024BV/025AV/026AV
and
CY7C0241AV/0251AV/036AV are designed for battery backup.
Data retention voltage and supply current are guaranteed over VCC
temperature. The following rules ensure data retention:
1. Chip Enable (CE) must be held HIGH during data retention,
within VCC to VCC – 0.2V.
2. CE must be kept between VCC – 0.2V and 70 percent of VCC
CE
during the power up and power down transitions.
Data Retention Mode
3.0V
VCC > 2.0V
3.0V
VCC to VCC – 0.2V
3. The RAM can begin operation >tRC after VCC reaches the
minimum operating voltage (3.0V).
Parameter
Test Conditions[28]
ICCDR1
at VCCDR = 2V
Notes
25. For information on port to port delay through RAM cells from writing port to reading port, refer to Figure 12.
26. Test conditions used are Load 2.
27. tBDD is a calculated parameter and is the greater of tWDD – tPWE (actual) or tDDD – tSD (actual).
28. CE = VCC, Vin = GND to VCC, TA = 25°C. This parameter is guaranteed but not tested.
tRC
VIH
Max
50
Unit
μA
Document #: 38-06052 Rev. *J
Page 10 of 19
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