CS7615-KQ Просмотр технического описания (PDF) - Cirrus Logic
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Компоненты Описание
производитель
CS7615-KQ Datasheet PDF : 36 Pages
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CS7615
AGC Maximum Gain Register (2Ah)
7
mgn7
r/w
6
mgn6
r/w
5
mgn5
r/w
4
mgn4
r/w
3
mgn3
r/w
2
mgn2
r/w
1
mgn1
r/w
0
mgn0
r/w
MGN
Sets the maximum gain allowable if the user chooses to limit the chip gain beyond a certain
value. The range is 0-242, with the actual max gain word being twice this value. Default is F2h.
AGC Slew and Speed Register (2Bh)
7
6
5
4
3
2
1
0
res
res
res
res
slew1
slew0
spd1
spd0
r
r
r
r
r/w
r/w
r/w
r/w
SLEW
Sets the rate of decay of gain when the gain target is exceeded in the maximum intensity bin.
Default is 0h.
00 = -8 10 = -32
01 = -16 11 = -64
SPD
Varies the AGC loop gain. The error signal used for correction is multiplied by the speed num-
ber before being added to the accumulator. Default is 0h.
00 = 1x 10 = 4x
01 = 2x 11 = 8x
AGC Minimum Gain Register (2Ch)
7
mng7
r/w
6
mng6
r/w
5
mng5
r/w
4
mng4
r/w
3
mng3
r/w
2
mng2
r/w
1
mng1
r/w
0
mng0
r/w
MNGN
Sets the minimum gain allowable if the user chooses to limit the chip gain from a certain value.
Default is 00h.
CCD Signal Alignment Register (2Dh)
7
6
5
4
3
2
1
0
HR1
HR0
HF1
HF0
FRR1
FRR0
FRF1
FRF0
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
These signals adjust the edges of H1 or FR with respect to the internal sampling clock.
HR
Adjusts the location of the rising edge of H1.
HF
Adjusts the location of the falling edge of H1.
FRR
Adjusts the location of the rising edge of FR.
FRF
Adjusts the location of the falling edge of FR.
DS231PP6
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