CS5521 Просмотр технического описания (PDF) - Cirrus Logic

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CS5521

16-bit or 24-bit, 2/4/8-channel ADCs with PGIA

Cirrus Logic 

CS5521/22/23/24/28

1.2.1 System Initialization

After power is first applied to the

CS5521/22/2324/28 devices, the user should wait

for the oscillator to start before attempting to com-

municate with the converter. If a 32.768 kHz crys-

tal is used, this may be 500 milliseconds.

The initialization sequence should be as follows:

Initialize the serial port by sending the port initial-

ization sequence of 15 bytes of all 1's followed by

one byte with the following bit contents '1111 110'.

This sequence places the chip in the command

mode where it waits for a valid command to be

written. The first command should be to perform a

system reset. This is accomplished by writing a

logic 1 to the RS (Reset System) bit in the configu-

ration register. After a reset the RV bit is set until

the configuration register is read. The user must

then write a logic 0 to the RS bit to take the part out

of reset mode. Any other bits written to the config-

uration register at this time will be lost. The con-

figuration register must be written again once RS=

0 to set any other bits to their desired settings.

After a reset, the on-chip registers are initialized to

the following states:

configuration register:

offset registers:

gain registers:

channel setup registers:

000040(H)

000000(H)

400000(H)

000000(H)

18

DS317F6

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