CS5151 Просмотр технического описания (PDF) - Cherry semiconductor
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CS5151 Datasheet PDF : 14 Pages
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Block Diagram
VCC1
SS
VID0
VID1
VID2
VID3
VFB
COMP
VFFB
LGnd
VCC1 Monitor
Comparator
-
+
3.90V
3.85V
5V
60µA
2µA
4 BIT
DAC
Error
+ Amplifier
-
Slow Feedback
PWM
Comparator
-
+
Fast Feedback
-
+
VFFB Low
1V
Comparator
PWM
COMP
2.5V
SS Low
- Comparator
+
0.7V
SS High
+ Comparator
-
FAULT
R
Q
S
Q FAULT
FAULT
Latch
Maximum
On-Time
Timeout
Normal
Off-Time
Timeout
Extended
Off-Time
Timeout
R
Q
S
Q
PWM
Latch
Off-Time
Timeout
GATE = ON
GATE = OFF
COFF
One Shot
R
S
Q
Time Out
Timer
(30µs)
Edge Triggered
VCC2
VGATE
PGnd
COFF
Applications Information
Theory of Operation
V2™ Control Method
The V2™ method of control uses a ramp signal that is gen-
erated by the ESR of the output capacitors. This ramp is
proportional to the AC current through the main inductor
and is offset by the value of the DC output voltage. This
control scheme inherently compensates for variation in
either line or load conditions, since the ramp signal is gen-
erated from the output voltage itself. This control scheme
differs from traditional techniques such as voltage mode,
which generates an artificial ramp, and current mode,
which generates a ramp from inductor current.
PWM
Comparator
C
–
VGATE
Ramp
Signal
VFFB
COMP
Error
Amplifier
–
E
Error
Signal
+
Figure 1: V2™ Control Diagram
Output
Voltage
Feedback
VFB
Reference
Voltage
The V2™ control method is illustrated in Figure 1. The out-
put voltage is used to generate both the error signal and the
ramp signal. Since the ramp signal is simply the output
voltage, it is affected by any change in the output regard-
less of the origin of that change. The ramp signal also con-
tains the DC portion of the output voltage, which allows
the control circuit to drive the main switch to 0% or 100%
duty cycle as required.
A change in line voltage changes the current ramp in the
inductor, affecting the ramp signal, which causes the V2™
control scheme to compensate the duty cycle. Since the
change in inductor current modifies the ramp signal, as in
current mode control, the V2™ control scheme has the
same advantages in line transient response.
A change in load current will have an affect on the output
voltage, altering the ramp signal. A load step immediately
changes the state of the comparator output, which controls
the main switch. Load transient response is determined
only by the comparator response time and the transition
speed of the main switch. The reaction time to an output
load step has no relation to the crossover frequency of the
error signal loop, as in traditional control methods.
The error signal loop can have a low crossover frequency,
since transient response is handled by the ramp signal loop.
The main purpose of this ‘slow’ feedback loop is to provide
DC accuracy. Noise immunity is significantly improved,
since the error amplifier bandwidth can be rolled off at a low
frequency. Enhanced noise immunity improves remote sens-
5
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