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CS4525-CNZR Просмотр технического описания (PDF) - Cirrus Logic

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CS4525-CNZR Datasheet PDF : 98 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
LVD
DGND
VD_REG
VD
VA_REG
AGND
FILT+
VQ
AFILTL
AFILTR
AINL
AINR
OCREF
PGND
RAMP_CAP
VP
OUT4
OUT3
OUT2
OUT1
PWM_SIG2
PWM_SIG1
DLY_SDOUT
DLY_SDIN/
EX_TWR
AUX_SDOUT
AUX_SCLK
AUX_LRCK/
AD0
SYS_CLK
XTO
XTI
Thermal Pad
CS4525
VD Voltage Level Indicator (Input) - Identifies the voltage level attached to VD. When applying
9 5.0 V to VD, LVD must be connected to VD. When applying 2.5 V or 3.3 V to VD, LVD must be
DGND.
10 Digital Ground (Input) - Ground for the internal logic and digital I/O.
11 Core Logic Power (Output) - Internally generated low voltage power supply for digital logic.
12 Power (Input) - Positive power supply for the internal regulators and digital I/O.
13 Analog Power (Output) - Internally generated positive power for the analog section and I/O.
14 Analog Ground (Input) - Ground reference for the internal analog section and I/O.
15
Positive Voltage Reference (Output) - Positive reference voltage for the internal ADC sampling
circuits.
16 Common Mode Voltage (Output) - Filter connection for internal common mode voltage.
17
18
Antialias Filter Connection (Output) - Antialias filter connection for ADC inputs.
19 Analog Input (Input) - The full-scale input level is specified in the ADC Analog Characteristics
20 specification table.
21 Over Current Reference Setting (Input) - Sets the reference for over current detection.
22,23
27,28
33,34
37,38
Power Ground (Input) - Ground for the individual output power half-bridge devices.
24
Output Ramp Capacitor (Input) - Used by the PWM Popguard Transient Control to suppress the
initial pop in half-bridge-configured outputs.
25,30,
31,36
High Voltage Power (Input) - High voltage power supply for the individual half-bridge devices.
26
29
32
PWM Output (Output) - Amplified PWM power outputs.
35
39
40
Logic Level PWM Output (Output) - Logic Level PWM switching signals.
41 Delay Serial Audio Data Out (Output) - Output for two’s complement serial audio data.
Delay Serial Audio Data Input (Input) - Input for two’s complement serial audio data.
42 External Thermal Warning (Input) - Input for an external thermal warning signal. Configurable via
the I²C control port.
43
Auxiliary Port Serial Audio Data Out (Output) - Output for two’s complement auxiliary port serial
data.
44 Auxiliary Port Serial Clock (Output) - Serial clock for the auxiliary port serial interface.
Auxiliary Port Left Right Clock (Output) - Determines which channel, Left or Right, is currently
45 active on the serial audio data line.
AD0 (Input) - Sets the LSB of the I²C device address. Sensed on the release of RST.
46
System Clock (Input/Output) -Clock source for the internal logic, processing, and modulators. This
pin should be connected to through a 10kΩ to ground when unused.
47 Crystal Oscillator Output (Output) - Crystal oscillator driver output.
48 Crystal Oscillator Input (Input) - Crystal oscillator driver input.
-
Thermal Pad - Thermal relief pad for optimized heat dissipation. See “QFN Thermal Pad” on
page 65 for more information.
DS726PP1
9

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