CS4392(2002) Просмотр технического описания (PDF) - Cirrus Logic

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CS4392
(Rev.:2002)

24-Bit, 192 kHz Stereo DAC with Volume Control

Cirrus Logic 

CS4392

3. APPLICATIONS

3.1 Recommended Power-up Sequence for Hardware Mode

1) Hold RST low until the power supplies, master, and left/right clocks are stable.

2) Bring RST high. After 10ms the device will begin normal operation.

3.2 Recommended Power-up Sequence and Access to Control Port Mode

1) Hold RST low until the power supply, master, and left/right clocks are stable. In this state, the control

port is reset to its default settings and FILT+ will remain low.

2) Bring RST high. The device will remain in a low power state with FILT+ low and the control port is

accessible.

3) Write 30h to register 05h within 10 ms cycles following the release of RST. If after 10ms the control

port has not been initiated with this command, the device will enter stand-alone mode. The CPEN bit,

however, may be written at any time after 10ms. It is recommended to write CPEN before 10ms in or-

der to reduce the possibility of any extraneous click or pop noise from occurring.

4) The desired register settings can be loaded while keeping the PDN bit set to 1.

5) Set the PDN bit to 0. This will initiate the power-up sequence which requires approximately 10 µS.

3.3 Analog Output and Filtering

The application note “Design Notes for a 2-Pole Filter with Differential Input” discusses the second-order

Butterworth filter and differential to single-ended converter as seen in Figure 3. An alternate configuration

can be seen on the CDB4392. This alternate filter configuration accounts for the differing AC loads on the

+ and - differential output pins which are normally present in a circuit like Figure 3. It also shows an AC

coupling configuration which reduces the number of required AC coupling capacitors to 2 caps per chan-

nel. The circuit in figure 3 may also be DC coupled, however the filter on the CDB4392 must be

AC coupled. The CS4392 is a linear phase design and does not include phase or amplitude compensation

for an external filter. Therefore, the DAC system phase and amplitude response will be dependent on the

external analog circuitry.

3.32k

2700 pF

680 pF

Aout -

Aout +

10 uF

10 uF

3.01k

1.58k

2

1

3

3.01k

2700 pF

1.58k

R17

3.32k

C10

680 pF

10 uF

560

47k

Analog_Out

Figure 3. CS4392 Output Filter

DS459PP2

9

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