CS18101X Просмотр технического описания (PDF) - Cirrus Logic
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CS18101X Datasheet PDF : 54 Pages
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6.1.1 Normal Mode Data Timing
CobraNet Hardware User’s Manual
Digital Audio Interface
DAI1_SCLK
FS1
DAI1_DATAx
DAO1_DATAx
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Unused
23
Unused
23
Figure 8. Audio Data Timing Detail - Normal Mode, 64FS - CS18100x/CS49610x, CS18101x/CS49611x
DAI1_SCLK
FS1
DAI1_DATAx 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
DAO1_DATAx 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Unused
Unused
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Unused
23
Unused
23
Figure 9. Audio Data Timing Detail - Normal Mode, 128FS - CS18102x/CS49612x
Each audio channel is comprised of 32 bits of data, regardless of audio sample size. The
figure above shows 24-bit audio data.
The MSB is left justified and is aligned with FS1. Data is sampled on the rising edge of
DAI_SCLK and data changes on the falling edge.
6.1.2 I2S Mode Data Timing
DAI1_SCLK
FS1
DAI1_DATAx
DAO1_DATAx
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Unused
23
Unused
23
Figure 10. Audio Data Timing Detail - I2S Mode, 64FS - CS18100x/CS49610x, CS18101x/CS49611x
DAI1_SCLK
FS1
DAI1_DATAx 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
DAO1_DATAx 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Unused
Unused
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Unused
23
Unused
23
Figure 11. Audio Data Timing Detail - I2S Mode, 128FS - CS18102x & CS49612x
Each audio channel is comprised of 32 bits of data, regardless of audio sample size. The
figure above shows 24-bit audio data.
The MSB is left justified and arrives one bit period following FS1. Data is sampled on the
rising edge of DAI_SCLK and data changes on the falling edge.
DS651UM23
©Copyright 2005 Cirrus Logic, Inc.
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Version 2.3
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