CMP0417AA1-E Просмотр технического описания (PDF) - FIDELIX

Номер в каталоге

Компоненты Описание

Список матч

CMP0417AA1-E

256K x 16 bit Super Low Power and Low Voltage Full CMOS RAM

FIDELIX 

CMP0417AAx-E

CMOS LPRAM

LOW POWER MODES

1. Mode Register Set

A17 ~ A5

A4

A3

A2

A1

A0

0

1

Array On/Off

on /ZZ

Half Selection

Array Refresh Area

Array Refresh Area

A1 A0

Type

0

0

Full Array (Default)

0

1

RFU1)

1

0

½ Array

1

1

¼ Array

1. RFU : Reserved for the Future Use

Half Selection (Top / Bottom)

A2

Type

0

Bottom (Default)

1

Top

Array On/Off on /ZZ

A3

Type

0

Partial Array Refresh Mode (Default)

1

Reduced Memory Size Mode

Note: The RMS(Reduced Memory Size) mode is enabled after

/ZZ goes high and remains enabled after /ZZ goes high. To

change to a different mode, the mode register will have to be

rewritten.

2. MRS Update

Address

/CS

/UB, /LB

/WE

/ZZ

tAS(3)

tZZWE

tWC

tCW(2)

tAW

tBW

tWP(1)

tWR(4)

Register Write Start

Register Write

Complete

Register Update

Complete

The register update take place on the rising edge of /ZZ. Once the register is updated, the next time /ZZ goes low, without any

updates to the register starting within the tZZWE max time of 1us, the part will refresh the array selected. The data bus is a

don’t care When /ZZ is low during the register updates.

10

Revision 0.5

Aug. 2006

Share Link: