CL-PS6700 Просмотр технического описания (PDF) - Cirrus Logic

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CL-PS6700

Low-Power PC Card Controller for the CL-PS7111

Cirrus Logic 

CL-PS6700

Low-Power PC Card Controller

TABLE OF CONTENTS

CONVENTIONS ......................................................................................... 5

1. PIN INFORMATION.................................................................................... 7

1.1 100-Pin VQFP Pin Diagram ....................................................................................... 7

1.2 Pin Listings................................................................................................................. 8

2. PIN DESCRIPTIONS................................................................................ 10

2.1 CL-PS7111-to-CL-PS6700 Interface Signals........................................................... 10

2.1.1 Address/Data Bus Signals ............................................................................ 10

2.1.2 Access Control Signals................................................................................. 12

2.1.3 Interrupt and Abort Signals........................................................................... 13

2.1.4 Clock, Reset, and Sleep Signals .................................................................. 13

2.2 PC Card Interface Signals........................................................................................ 14

2.2.1 Address and Data Signals ............................................................................ 14

2.2.2 Access Control Signals................................................................................. 14

2.2.3 Additional Control for I/O Signals.................................................................. 16

2.2.4 Card Detect and Battery Status Signals ....................................................... 16

2.2.5 Card Voltages and Reset Signals ................................................................. 17

2.3 Power and Ground Pins ........................................................................................... 17

3. FUNCTIONAL DESCRIPTION................................................................. 18

3.1 PC Card (PCMCIA) Interface ................................................................................... 18

3.1.1 PC Card Types.............................................................................................. 18

3.1.2 PC Card Address/Data Bus .......................................................................... 18

3.1.3 PC Card Address Spaces and DMA............................................................. 18

3.1.4 Byte Assembly/Disassembly and Queueing ................................................. 19

3.1.5 Card Configuration........................................................................................ 19

3.1.6 Hot Insertion Support ................................................................................... 19

3.2 Power States ............................................................................................................ 20

3.2.1 Active State................................................................................................... 20

3.2.2 Idle State....................................................................................................... 20

3.2.3 Standby State ............................................................................................... 20

4. REGISTERS ............................................................................................. 21

4.1 Register Addresses.................................................................................................. 21

4.2 Interrupt Structure .................................................................................................... 23

4.3 Power Management Registers ................................................................................. 24

4.3.1 Power Management Register (0X0C002800) ............................................... 24

4.3.2 Card Power Control Register (0X0C002C00) ............................................... 25

4.4 System Interface Registers ...................................................................................... 26

4.4.1 System Interface Configuration Register (0X0C002000).............................. 26

4.4.2 DMA Control Register (0X0C004000) .......................................................... 27

4.4.3 Device Information Register (0X0C004400) ................................................. 27

4.5 Card Interface Registers .......................................................................................... 28

4.5.1 Card Interface Configuration Register (0X0C002400).................................. 28

4.5.2 Card Interface Timing Register 0A (0X0C003000) ....................................... 29

4.5.3 Card Interface Timing Register 0B (0X0C003400) ....................................... 29

4.5.4 Card Interface Timing Register 1A (0X0C003800) ....................................... 30

4.5.5 Card Interface Timing Register 1B (0X0C003C00)....................................... 30

CIRRUS LOGIC CONFIDENTIAL, NDA REQUIRED

November 1997

PRELIMINARY DATA BOOK v1.0

3

TABLE OF CONTENTS

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