CDP1855 Просмотр технического описания (PDF) - Intersil
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CDP1855 Datasheet PDF : 15 Pages
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CDP1855, CDP1855C
CDP1855 Interfacing Schemes
VCC
CLEAR
XTAL
MA0
MA1
MAX
CDP1802
TPA
MWR
MRD
TPB
EF
BUS
HIGH
ADDRESS
LATCH
CLEAR
+VDD
CLOCK
RA0
RA1
RA2
CI
CN0
CN1
CDP1855
YL
RE/WE
ZR
CE
CTL
STB
YR
CO
BUS
ZL
FIGURE 3. REQUIRED CONNECTION FOR MEMORY MAPPED
ADDRESSING OF THE MDU
14
28 27 26 25
VSS VDD CN0 CN1 CI
24
YR
6
ZL
3
CTL
CDP1855
MDU
5
YL 23
ZR
22
BUS 7
21
BUS 6
20
BUS 5
19
BUS 4
2
CLEAR
18
BUS 3
8
CLK
17
BUS 2
10
RD/WE
16
BUS 1
9
STB
15
BUS 0
RA2 RA1 RA0 CE
DATA BUS
DATA
BUS
11 12 13 1
A8
A9
IO/M
WR
1/4 CD4011
RD
CLK (OUT)
1/4 CD4011
RESET OUT
FIGURE 4. INTERFACING THE CDP1855 TO AN 8085 MICRO-
PROCESSOR AS AN I/O DEVICE
Programming Example for Multiplication
For a 24-bit x 24-bit multiply using the system shown in Figure 5, the following is an assembly listing of a program to multiply 201F7C16 by
723C0916:
MEMORY
LOCATION
OP
CODE
LINE
NO.
ASSEMBLY LANGUAGE
0000
F830;
0001
LDI 030H
0002
0003
0005
0006
0008
0008
0008
0008
000A
A2;
F800;
B2;
6758;
;
;
;
6420;
;
0002
0003
0004
0005
0006
0007
0008
0009
0010
PLO R2
LDI 00H
PHI R2
OUT 7; DC 058H
OUT 4; DC 020H
. . LOAD 30 INTO R2.0
. . LOAD 00 INTO R2.1 (R2=0030)
. . LOAD CONTROL REGISTERS
. . SPECIFYING THREE MDU’s
. . RESET THE Y REGISTER AND
. . SEQUENCE COUNTER
. . LOAD MSB OF X REGISTER
. . WITH 20
000A
000C
000C
000E
000E
0010
641F;
;
647C;
;
6572;
;
0011
0012
0013
0014
0015
0016
OUT 4; DC 01FH
OUT 4; DC 07CH
OUT 5; DC 072H
. . LOAD NEXT MSB OF X REG
. . WITH 1F
. . LOAD LSB OF X REGISTER
. . WITH 7C
. . LOAD MSB OF Z REGISTER
. . WITH 72
4-54
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