CDB5396 Просмотр технического описания (PDF) - Cirrus Logic

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CDB5396

120 dB, 96 kHz Audio A/D Converter

Cirrus Logic 

CS5396 CS5397

SPI CONTROL PORT SWITCHING CHARACTERISTICS (TA = 25 °C; VD, VA = 5V ±5%;

Inputs: Logic 0 = DGND, Logic 1 = VD; CL = 20 pF)

Parameter

Symbol

Min

Max

Unit

SPI Mode

CCLK Clock Frequency

CS High Time Between Transmissions

CS Falling to CCLK Edge

CCLK Low Time

CCLK High Time

CDIN to CCLK Rising Setup Time

CCLK Rising to DATA Hold Time

Rise Time of CCLK and CDIN

Fall Time of CCLK and CDIN

fsck

-

tcsh

1.0

tcss

20

tscl

66

tsch

66

tdsu

40

(Note 7)

tdh

15

(Note 8)

tr2

-

(Note 8)

tf2

-

6

MHz

-

µs

-

ns

-

ns

-

ns

-

ns

-

ns

100

ns

100

ns

Notes: 7. Data must be held for sufficient time to bridge the transition time of CCLK.

8. For FSCK < 1 MHz.

CS

t css

t scl t sch

t csh

CCLK

t r2

t f2

CDIN

t dsu t dh

DS229PP2

9

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