CS5364-DQZ(2007) Просмотр технического описания (PDF) - Cirrus Logic
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CS5364-DQZ Datasheet PDF : 41 Pages
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CS5364
2. TYPICAL CONNECTION DIAGRAM
+5V
Resistor may only be used if
VD is derived from VA. If used,
do not drive any other logic
from VD.
+
1 μF
0.01 μF
5.1 Ω
4, 9
+
1 μF
0.01 μF
33
+5V to 3.3V
220 μ F +
1μF +
6
0.1 μF 5
7
0.1 μF 8
VA
FILT+
REF_GND
VQ
GND
Channel 1 Analog 47
Input Buffer
48
Channel 2 Analog 1
Input Buffer
2
AIN 1+
AIN 1-
AIN 2+
AIN 2-
VD
VLC 35
0.01 μF
MODE1/SCL/CCLK
40
MODE0/SDA/CDOUT
36
OVFL
DIF1/AD1/CDIN
37
DIF0/AD0/CS
38
RST
41
MDIV
42
34
CLKMODE
+5V to 1.8V
Power Down
and Mode
Settings
Channel 3 Analog 13
Input Buffer
14
Channel 4 Analog 11
Input Buffer
12
AIN 3+
AIN 3-
AIN 4+
AIN 4-
CS5364
A/D CONVERTER
28
VLS
0.01 μF
SDOUT1/TDM
30
SDOUT2
27
TDM
31
RESERVED
26
LRCK/FS
24
SCLK
25
23
MCLK
+5V to 1.8V
Audio Data
Processor
Timing Logic
and Clock
20
VX
+5V
XTI
21
XTO
22
GND
3, 8,10, 15, 16, 17, 18,
19, 29, 32, 43, 44, 45, 46
Figure 2. Typical Connection Diagram
For analog buffer configurations, refer to Cirrus Application Note AN241. Also, a low-cost single-ended-to-differen-
tial solution is provided on the Customer Evaluation Board.
DS625F2
9
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