CS4385
SWITCHING CHARACTERISTICS - CONTROL PORT - I2C FORMAT
(Inputs: Logic 0 = GND, Logic 1 = VLC, CL = 30 pF)
Parameter
Symbol
Min
Max
SCL Clock Frequency
fscl
-
RST Rising Edge to Start
tirs
500
Bus Free Time Between Transmissions
tbuf
4.7
Start Condition Hold Time (prior to first clock pulse)
thdst
4.0
Clock Low time
tlow
4.7
Clock High Time
thigh
4.0
Setup Time for Repeated Start Condition
tsust
4.7
SDA Hold Time from SCL Falling
(Note 16)
thdd
0
SDA Setup time to SCL Rising
tsud
250
Rise Time of SCL and SDA
trc, trc
-
Fall Time SCL and SDA
tfc, tfc
-
Setup Time for Stop Condition
tsusp
4.7
Acknowledge Delay from SCL Falling
tack
300
100
-
-
-
-
-
-
-
-
1
300
-
1000
Notes: 16. Data must be held for sufficient time to bridge the transition time, tfc, of SCL.
Unit
kHz
ns
µs
µs
µs
µs
µs
µs
ns
µs
ns
µs
ns
RST
t irs
Stop
S tart
SDA
t buf
t hdst
t high
SCL
t
low
t
hdd
R epeated
S ta rt
t hdst
tf
t sud
t sust
tr
Figure 5. Control Port Timing - I2C Format
Stop
t susp
14
DS671A1