CS4351(2004) Просмотр технического описания (PDF) - Cirrus Logic

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CS4351
(Rev.:2004)

192 kHz Stereo DAC with 2 Vrms Line Out

Cirrus Logic 

CS4351

SWITCHING SPECIFICATIONS - SERIAL AUDIO INTERFACE

Parameters

MCLK Frequency

MCLK Duty Cycle

Input Sample Rate (Manual selection)

Input Sample Rate (Auto selection)

LRCK Duty Cycle

SCLK Pulse Width Low

SCLK Pulse Width High

SCLK Period

SCLK rising to LRCK edge delay

SCLK rising to LRCK edge setup time

SDIN valid to SCLK rising setup time

SCLK rising to SDIN hold time

Symbol

Single-Speed Mode Fs

Double-Speed Mode Fs

Quad-Speed Mode Fs

Single-Speed Mode Fs

Double-Speed Mode Fs

Quad-Speed Mode Fs

Single Speed Mode

Double Speed Mode

Quad Speed Mode

tsclkl

tsclkh

tsclkw

tsclkw

tsclkw

tslrd

tslrs

tsdlrs

tsdh

Min

1.024

45

4

50

100

4

84

170

40

20

20

----------1-----------

( 128 ) F s

(---6---4--1--)--F----s--

--------2---------

MCLK

20

20

20

20

Max

Units

51.2

MHz

55

%

50

kHz

100

kHz

200

kHz

50

kHz

100

kHz

200

kHz

60

%

-

ns

-

ns

-

-

-

-

-

-

-

ns

-

ns

-

ns

-

ns

LRCK

SCLK

SDATA

t slrd

t sdlrs

t slrs

t sclkh

t sclkl

t sdh

Figure 1. Serial Input Timing

DS566PP2

11

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