CS4228-KS Просмотр технического описания (PDF) - Cirrus Logic
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CS4228-KS Datasheet PDF : 30 Pages
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CS4228
SWITCHING CHARACTERISTICS - CONTROL PORT (TA = 25°C, VD = VL = +3.3V,
VA = +5V; Inputs: logic 0 = DGND, logic 1 = VL+, CL = 30 pF)
Parameter
Symbol
Min
Max
Units
SPI Mode (SDOUT > 47kΩ to GND)
CCLK Clock Frequency
CS High Time Between Transmissions
fsck
-
tcsh
1.0
6
MHz
µs
CS Falling to CCLK Edge
tcss
20
ns
CCLK Low Time
tscl
66
ns
CCLK High Time
tsch
66
ns
CDIN to CCLK Rising Setup Time
tdsu
40
ns
CCLK Rising to DATA Hold Time
(Note 9)
tdh
15
ns
Rise Time of CCLK and CDIN
(Note 10)
tr2
100
ns
Fall Time of CCLK and CDIN
(Note 10)
tf2
100
ns
Notes: 9. Data must be held for sufficient time to bridge the transition time of CCLK.
10. For FSCK < 1 MHz
CS
t css
t scl t sch
t csh
CCLK
t r2
t f2
CDIN
t dsu t dh
Figure 3. SPI Control Port Timing
8
DS307PP1
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