CA3310AD Просмотр технического описания (PDF) - Intersil
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CA3310AD Datasheet PDF : 15 Pages
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CA3310, CA3310A
Typical Performances Curves (Continued)
12
VDD = VAA = VREF = 3 - 6V
10
LOAD = 50pF/OUTPUT
CONTINUOUS CONVERSIONS
8
6V
6
4
5V
2
4V
3V
0
0
0.5
1.0
1.5
2.0
2.5 3.0 3.5
CLOCK FREQUENCY (MHz)
FIGURE 14. SUPPLY CURRENT vs CLOCK FREQUENCY
8
VDD = 3-6V
7
AND REXT = OPEN OR SHORTED.
CLOCK = INTERNAL, FREE RUNNING
6
VDD = VAA+
5
VDD = 6V, REXT = SHORT
5V, OPEN
4
5V, SHORT
3
VDD = 6V, REXT = OPEN
2
4V, OPEN
4V, SHORT 3V, SHORT
1
3V, OPEN
0
-50 -40
0 25
85
125
TEMPERATURE (oC)
FIGURE 15. SUPPLY CURRENT vs TEMPERATURE
TABLE 1. PIN DESCRIPTIONS
PIN NUMBER
1-10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
NAME
D0 - D9
DRDY
VSS
DRST
OEM
OEL
VAA-
VAA+
VREF -
STRT
CLK
REXT
VREF +
VlN
VDD
DESCRIPTION
Three-State outputs for data bits representing 20 (LSB) through 29 (MSB).
Output flag signifying new data is available. Goes high at end of clock period 13, goes low when new
conversion started. Also reset asynchronously by DRST.
Digital Ground.
Active low input, resets DRDY.
Active low input, three-state enable of D2 - D9.
Active low input, three-state enable of D0, D1.
Analog Ground.
Analog + Supply.
Reference input voltage, sets 0 code (-) end of input range.
Active Low Start Conversion Input. Recognized after end of clock period 13.
Clock input or output. Conversion functions are synchronous to high-going edge.
Clock adjust input when using internal clock.
Reference input voltage, set 1023 code (+) end of input range.
Analog Input.
Digital + Supply.
TABLE 2. OUTPUT CODES
CODE
DESCRIPTION
INPUT
VOLTAGE (NOTE 1)
MSB
LSB = -(--V----R----E----F---1+---0--–-2---4V----R----E----F-------)
(VREF+ – VREF-) = 4.608V
(V)
D9
D8
BINARY OUTPUT CODE
D7 D6 D5 D4 D3 D2
LSB
DECIMAL
D1 D0 COUNT
Zero
0.000
0000000000
0
1 LSB
1/4 (VREF+ - VREF-)
1/2 (VREF+ - VREF-)
3/4 (VREF+ - VREF-)
(VREF+ - VREF-) - 1 LSB
NOTE:
0.0045
1.152
2.304
3.456
4.6035
0000000001
0100000000
1000000000
1100000000
1111111111
1
256
512
768
1023
1. The voltages listed above are the ideal centers of each output code shown as a function of its associated reference voltage.
6-14
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