UPD4723GS-GJG-E1 Просмотр технического описания (PDF) - NEC => Renesas Technology

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UPD4723GS-GJG-E1

RS-232 LINE DRIVER/RECEIVER AT 3.3 V/5 V

NEC => Renesas Technology 

µPD4723

Truth Table

Driver

STBY

DIN

DOUT

Remarks

L

×

Z

Standby mode (DC/DC converter is stopped)

H

L

H

Space level output

H

H

L

Mark level output

Receiver

STBY

L

L

RIN

EN

R2 to R3

R1

L

×

×

H

L

×

L

H

H

×

H

×

L

H

×

H

3 V ↔ 5 V switchingNote 5

ROUT

R2 to R3

R1

H

H

H

H

L

H

H

L

Remarks

Standby mode 1 (DC/DC converter is stopped)

Standby mode 2 (DC/DC converter is stopped, R2 and

R3 are operated)

Standby mode 2 (DC/DC converter is stopped, R2 and

R3 are operated)

Mark level input

Space level input

VCHA

L

H

Operating mode

5 V mode (double step-up)

3 V mode (3 times step-up)

H: high-level, L: low-level, Z: high-impedance, ×: H or L

Note 5. When switching VCHA, standby mode must be selected (STBY = L).

3

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