BS62LV1028 Просмотр технического описания (PDF) - Brilliance Semiconductor
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BS62LV1028 Datasheet PDF : 10 Pages
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BSI
AC TEST CONDITIONS
(Test Load and Input/Output Reference)
Input Pulse Levels
Vcc / 0V
Input Rise and Fall Times
1V/ns
Input and Output
Timing Reference Level
Output Load
0.5Vcc
CL = 30pF+1TTL
CL = 100pF+1TTL
BS62LV1028
KEY TO SWITCHING WAVEFORMS
WAVEFORM
INPUTS
MUST BE
STEADY
MAY CHANGE
FROM H TO L
MAY CHANGE
FROM L TO H
,
DON T CARE:
ANY CHANGE
PERMITTED
DOES NOT
APPLY
OUTPUTS
MUST BE
STEADY
WILL BE
CHANGE
FROM H TO L
WILL BE
CHANGE
FROM L TO H
CHANGE :
STATE
UNKNOWN
CENTER
LINE IS HIGH
IMPEDANCE
”OFF ”STATE
AC ELECTRICAL CHARACTERISTICS ( TA = -40oC to + 85oC )
READ CYCLE
JEDEC
PARAMETER
NAME
t AVAX
t AVQV
t E1LQV
t E2HOV
t GLQV
t E1LQX
t E2HOX
t GLQX
t E1HQZ
t E2HQZ
t GHQZ
t AXOX
PARAMETER
NAME
DESCRIPTION
tRC
tAA
tACS1
tACS2
tOE
tCLZ1
tCLZ2
tOLZ
tCHZ1
tCHZ2
tOHZ
Read Cycle Time
Address Access Time
Chip Select Access Time
Chip Select Access Time
Output Enable to Output Valid
Chip Select to Output Low Z
Chip Select to Output Low Z
Output Enable to Output in Low Z
Chip Deselect to Output in High Z
Chip Deselect to Output in High Z
Output Disable to Output in High Z
tOH
Data Hold from Address Change
(CE1)
(CE2)
(CE1)
(CE2)
(CE1)
(CE2)
CYCLE TIME : 55ns
(Vcc = 3.0~3.6V)
MIN. TYP. MAX.
55 -- --
-- -- 55
-- -- 55
-- -- 55
-- -- 30
10 -- --
10 -- --
10 -- --
-- -- 35
-- -- 35
-- -- 30
10 -- --
CYCLE TIME : 70ns
(Vcc = 2.7~3.6V)
MIN. TYP. MAX.
70 -- --
-- -- 70
-- -- 70
-- -- 70
-- -- 40
10 -- --
10 -- --
10 -- --
-- -- 40
-- -- 40
-- -- 35
10 -- --
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
R0201-BS62LV1028
4
Revision 2.1
Jan. 2004
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