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BD6210F-TR Просмотр технического описания (PDF) - ROHM Semiconductor

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BD6210F-TR Datasheet PDF : 16 Pages
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BD622Series
Technical Note
i) j) VREF control mode
The built-in VREF-switching on duty conversion circuit provides switching duty corresponding to the voltage of the
VREF pin and the VCC voltage. The function offers the same level of control as the high voltage output setting
function in previous models. The on duty is shown by the following equation.
DUTY VREF [V] / VCC [V]
For example, if VCC voltage is 12V and VREF pin voltage is 9V, the switching on duty is about 75 percent. However,
please note that the switching on duty might be limited by the range of VREF pin voltage (Refer to the operating
conditions, shown on page 2). The PWM carrier frequency in this mode is 25kHz (nominal), and the switching
operation is the same as it is the PWM control modes. When operating in this mode, do not input the PWM signal to
the FIN and RIN pins. In addition, establish a current path for the recovery current from the motor, by connecting a
bypass capacitor (10µF or more is recommended) between VCC and ground.
VCC
VREF
0
FIN
RIN
OUT1
OUT2
Fig.40 VREF control operation (timing chart)
2) Cross-conduction protection circuit
In the full bridge output stage, when the upper and lower transistors are turned on at the same time, and this
condition exists during the period of transition from high to low, or low to high, a rush current flows from the power
supply to ground, resulting in a loss. This circuit protects against the rush current by providing a dead time (about
400ns, nominal) at the transition.
3) Output protection circuits
a) Under voltage lock out (UVLO) circuit
To secure the lowest power supply voltage necessary to operate the controller, and to prevent under voltage
malfunctions, a UVLO circuit has been built into this driver. When the power supply voltage falls to 5.0V (nominal) or
below, the controller forces all driver outputs to high impedance. When the voltage rises to 5.5V (nominal) or above,
the UVLO circuit ends the lockout operation and returns the chip to normal operation.
b) Over voltage protection (OVP) circuit
When the power supply voltage exceeds 30V (nominal), the controller forces all driver outputs to high impedance.
The OVP circuit is released and its operation ends when the voltage drops back to 25V (nominal) or below. This
protection circuit does not work in the stand-by mode. Also, note that this circuit is supplementary, and thus if it is
asserted, the absolute maximum rating will have been exceeded. Therefore, do not continue to use the IC after this
circuit is activated, and do not operate the IC in an environment where activation of the circuit is assumed.
c) Thermal shutdown (TSD) circuit
The TSD circuit operates when the junction temperature of the driver exceeds the preset temperature (175°C
nominal). At this time, the controller forces all driver outputs to high impedance. Since thermal hysteresis is provided
in the TSD circuit, the chip returns to normal operation when the junction temperature falls below the preset
temperature (150°C nominal). Thus, it is a self-returning type circuit.
The TSD circuit is designed only to shut the IC off to prevent thermal runaway. It is not designed to protect the IC or
guarantee its operation in the presence of extreme heat. Do not continue to use the IC after the TSD circuit is
activated, and do not operate the IC in an environment where activation of the circuit is assumed.
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10/15
2010.07 - Rev.D

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