HD74HC237 Просмотр технического описания (PDF) - Hitachi -> Renesas Electronics
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HD74HC237 Datasheet PDF : 9 Pages
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HD74HC237
3-to-8-line Decoder/Demultiplexer with Address Latch
Description
The HD74HC237 decodes a three-bit Address to one-of-eight active-high outputs. The device has a
transparent latch for storage of the Address. Two Chip Selects, one active-low and one active-high, are
provided to facilitate the demultiplexing, cascading, and chip-selecting functions.
The demultiplexing function is accomplished by using the Address inputs to select the desired device
output, and then by using one of the Chip Selects as a data input while holding the other one active.
The HD74HD237 is the noninverting version of the HD74HC137.
Features
• High Speed Operation: tpd (Data to Y) = 19 ns typ (CL = 50 pF)
• High Output Current: Fanout of 10 LSTTL Loads
• Wide Operating Voltage: VCC = 2 to 6 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
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