Rev. 1.0
AS6C3216
32M Bits ( 2Mx16 / 4Mx8 Switchable) LOW POWER CMOS SRAM
FUNCTIONAL BLOCK DIAGRAM
Vcc
Vss
A0~A20
/A-1~A20
DECODER
2048Kx16/4096Kx8
MEMORY ARRAY
DQ0-DQ7
Lower Byte
DQ8-DQ15
Upper Byte
I/O DATA
CIRCUIT
CE#
CE2
WE#
OE#
LB#
UB#
BYTE#
CONTROL
CIRCUIT
COLUMN I/O
PIN DESCRIPTION
SYMBOL DESCRIPTION
A0 – A20 Address Inputs(word mode)
A-1 – A20 Address Inputs(byte mode)
DQ0 – DQ15 Data Inputs/Outputs
CE#, CE2 Chip Enable Input
WE#
Write Enable Input
OE#
Output Enable Input
LB#
Lower Byte Control
UB#
Upper Byte Control
BYTE#
Byte Enable
VCC
Power Supply
VSS
Ground
Alliance Memory, Inc.
2