APW7065 Просмотр технического описания (PDF) - Anpec Electronics

Номер в каталоге

Компоненты Описание

Список матч

APW7065

Synchronous Buck PWM Controller

Anpec Electronics 

APW7065

Functional Pin Description (Cont.)

VCC (Pin 5)

FB pin is also monitored for under voltage events.

Connect this pin to a 12V supply voltage. This pin

provides bias supply for the control circuitry and the

low-side MOSFET driver. The voltage at this pin is

monitored for the Power-On Reset (POR) purpose. It

is recommended that a decoupling capacitor (1 to

10uF) be connected to GND for noise decoupling.

FB (Pin 6)

This pin is the inverting input of the internal error

amplifier. Connect this pin to the output (VOUT) of the

converter via an external resistor divider for closed-

loop operation. The output voltage set by the resistor

divider is determined using the following formula :

VOUT

=

0.8 × 1+



R1 

R2 

where R1 is the resistor connected from VOUT to FB ,

and R2 is the resistor connected from FB to GND. The

COMP (Pin 7)

This pin is the output of PWM error amplifier. It is used

to set the compensation components. In addition, if

the pin is pulled below 1.2V, it will disable the device.

PHASE (Pin 8)

This pin is the return path for the upper gate driver.

Connect this pin to the upper MOSFET source. This

pin is also used to monitor the voltage drop across the

MOSFET for over-current protection.

Typical Characteristics

Power On

VCC=12V, Vin=12V

Vo=1.2V, L=1uH

CH1

CH2

Power Off

CH1

VCC=12V, Vin=12V

Vo=1.2V, L=1uH

CH2

CH3

CH4

CH1: VCC (5V/div)

CH2: VFB (1V/div)

CH3: Vo (1V/div)

CH4: Ug (20/Vdiv)

Time: 10ms/div

Copyright © ANPEC Electronics Corp.

Rev. A.1 - Feb., 2006

CH3

CH4

CH1: VCC (5V/div)

CH2: VFB (1V/div)

CH3: Vo (1V/div)

CH4: Ug (20/Vdiv)

Time: 10ms/div

6

www.anpec.com.tw

Share Link: