W981216BH-8H(2000) Просмотр технического описания (PDF) - Winbond

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W981216BH-8H
(Rev.:2000)

2M x 4 BANKS x 16 BIT SDRAM

Winbond 

Operating Timing Example, contined

Interleaved Bank Read (Burst Length = 8, CAS Latency = 3)

W981216BH

CLK

(CLK = 100 MHz)

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23

CS

RAS

CAS

tRC

tRAS

tRP

tRP

tRAS

tRC

tRAS

tRC

tRP

WE

BS0

BS1

A10

RAa

tRCD

RBb

tRCD

tRCD

RAc

A0-A9,

RAa

A11

DQM

CKE

DQ

CAx

RBb

CBy

RAc

CAz

tRRD

tAC

tAC

ax0 ax1 ax2 ax3 ax4 ax5 ax6 by0 by1

tRRD

tAC

by4 by5 by6 by7

CZ0

Bank #0 Active

Bank #1

Bank #2

Idle

Bank #3

Read

Precharge

Active

Precharge

Read

Active

Read

Precharge

- 21 -

Publication Release Date: October 2000

Revision A1

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