24LCS62 Просмотр технического описания (PDF) - Microchip Technology

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24LCS62

1K/2K Software Addressable I2C™ Serial EEPROM

Microchip Technology 

24LCS61/24LCS62

5.2 Clear Address Command

The Clear Address command will clear the device ID

byte from all devices on the bus and will enable all

devices to respond to the Assign Address command.

The master must end the command by sending an ACK

after 8 don’t care bits have been transmitted, followed

by a Stop bit. Sending the Stop bit in any other position

of the command will result in the command aborting

and the device releasing the bus.

FIGURE 5-2:

CLEAR ADDRESS COMMAND

S

T

A CONTROL

R

BYTE

T

S

T

Device ID Byte O

P

S

0

1

1

0

O

E

1

1

0

XXXXXXXX

P

A

A

C

C

K

K

5.3 Operation State Diagram

The diagram below shows the state diagram for basic

operation of the 24LCS61/62. This diagram shows

possible states and operational flow once power is

applied to the device. Table 5-1 summarizes operation

of each command for the assigned and unassigned

states.

FIGURE 5-3:

OPERATIONAL STATE DIAGRAM

Power Off

Power

Off

Power Off

Clear Address

Command

Power On

Unassigned

State

(ID byte not assigned yet)

Assigned

State

(ID byte has been assigned)

Assign Address Command:

Device loses Arbitration

Assign Address Command:

Device wins Arbitration

DS21226E-page 8

 2004 Microchip Technology Inc.

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