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AMD-766AC

AMD-766™ Peripheral Bus Controller

Advanced Micro Devices 

23167B – March 2001

Preliminary Information

AMD-766TM Peripheral Bus Controller Data Sheet

1 Overview

The AMD-766 peripheral bus controllerTM is an integrated circuit (IC), developed by AMD, to be the system

Southbridge component of personal computer chipsets. The AMD-766 peripheral bus controller (the IC) connects to

a host memory controller through the PCI bus.

1.1 Features

• PCI interface (PCI specification revision 2.2

compliant).

• LPC bus to connect peripherals such as super

IO and BIOS.

• Partial ISA bus.

• 8 bits wide.

• Support for Flash BIOS.

• Enhanced IDE controller.

• Support for two dual-drive ports.

• PIO modes 0-4.

• Multi-word DMA.

• UDMA modes up to ATA-100.

• OHCI-based USB host controller with support

for four ports.

• Serial IRQ protocol.

• ACPI-compliant power management logic.

• Programmable C2, C3, power-on-

suspend, suspend to RAM, suspend to

disk, and soft off states.

• Throttling.

• Hardware traps.

• System inactivity timer.

• 32 general-purpose IO (GPIO) pins (some are

multiplexed with other hard-wired functions).

• Privacy/security logic (ROM access control).

• Legacy logic.

• Programmable interrupt controller.

• Programmable interval timer.

• DMA controller (for LPC bus).

• Legacy ports.

• IOAPIC controller.

• Real-time clock.

• 256 bytes of CMOS RAM.

• Battery-powered.

• ACPI-compliant extensions.

• SMBus controller with one SMBus port.

• 272-pin BGA package.

• 3.3-volt core and output drivers; 5-volt

tolerant input buffers.

The IC is intended to fit into the traditional Southbridge position on PC-compatible platforms.

System

Memory

Host

Memory

Controller

PCI bus

IDE ports

USB ports

Super I/O

Peripheral

Bus

Controller

BIOS

ROM

LPC bus

ISA bus

5

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