AM79C970 Просмотр технического описания (PDF) - Advanced Micro Devices

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AM79C970

PCnet™-PCI Single-Chip Ethernet Controller for PCI Local Bus

Advanced Micro Devices 

AMD

PRELIMINARY

Target Initiated Termination

When the PCnet-PCI controller is a bus master, the cy-

cles it produces on the PCI bus may be terminated by

the target in one of three different ways.

Disconnect With Data Transfer

Figure 7 shows a disconnection in which one last data

transfer occurs after the target asserted STOP. STOP is

asserted on clock 4 to start the termination sequence.

Data is still transferred during this cycles, since both

IRDY and TRDY are asserted. The PCnet-PCI control-

ler terminates the current transfer with the deassertion

of FRAME on clock 5 and then one clock cycle later with

the deassertion IRDY. It finally releases the bus on clock

6. The PCnet-PCI controller will re-request the bus after

2 clock cycles, if it wants to transfer more data. The

starting address of the new transfer will be the address

of the next untransferred data.

CLK

1

2

3

4

5

6

7

8

9

10

11

FRAME

AD

C/BE

ADDR i DATA DATA

0111

0000

ADDR i+8

0111

PAR

PAR PAR PAR

IRDY

TRDY

DEVSEL

STOP

REQ

GNT

DEVSEL is sampled by the PCnet-PCI controller.

Figure 7. Disconnect with Data Transfer

18220C-9

1-894

Am79C970

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