HM5225645F-B60 Просмотр технического описания (PDF) - Hitachi -> Renesas Electronics

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HM5225645F-B60

256M LVTTL interface SDRAM 100 MHz 1-Mword × 64-bit × 4-bank/2-Mword × 32-bit × 4-bank PC/100 SDRAM

Hitachi -> Renesas Electronics 

HM5225645F-B60, HM5225325F-B60

Pin Description (HM5225645F)

Pin name

Function

A0 to A13

Address input

Row address A0 to A11

Column address A0 to A7

Bank select address A12/A13 (BS)

DQ0 to DQ63

Data-input/output

CS

Chip select

RAS

Row address strobe command

CAS

Column address strobe command

WE

Write enable

DQMB0 to DQMB7

Byte data mask*1

CLK

Clock input

CKE

Clock enable

VCC

VSS

Open

Power supply

Ground

Open*2

Note:

1. DQMB0: DQ0 to DQ7

DQMB1: DQ8 to DQ15

DQMB2: DQ16 to DQ23

DQMB3: DQ24 to DQ31

DQMB4: DQ32 to DQ39

DQMB5: DQ40 to DQ47

DQMB6: DQ48 to DQ55

DQMB7: DQ56 to DQ63

2. Don’t connect. Internally connected with die.

4

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