HM5225325FBP-B60 Просмотр технического описания (PDF) - Hitachi -> Renesas Electronics

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HM5225325FBP-B60

256M LVTTL interface SDRAM 100 MHz 1-Mword × 64-bit × 4-bank/2-Mword × 32-bit × 4-bank PC/100 SDRAM

Hitachi -> Renesas Electronics 

HM5225645F-B60, HM5225325F-B60

AC Characteristics

(Tcase = 0 to 70°C [Tj max = 110°C]), VCC = 3.3 V ± 0.3 V, VSS = 0 V)

HM5225645F/HM5225325F

-B60

Parameter

HITACHI PC/100

Symbol Symbol Min

Max

System clock cycle time

(CAS latency = 2)

t CK

Tclk

15

—

(CAS latency = 3)

t CK

Tclk

10

—

CLK high pulse width

t CKH

Tch

3

—

CLK low pulse width

t CKL

Tcl

3

—

Access time from CLK

(CAS latency = 2)

t AC

Tac

—

8

(CAS latency = 3)

t AC

Tac

—

6

Data-out hold time

t OH

Toh

3

—

CLK to Data-out low impedance tLZ

2

—

CLK to Data-out high impedance tHZ

(CAS latency = 2, 3)

—

6

Input setup time

tAS, tCS, tDS, Tsi

2

—

t CES

CKE setup time for power down tCESP

Tpde 2

—

exit

Input hold time

tAH, tCH, tDH, Thi

1

—

t CEH

Ref/Active to Ref/Active command tRC

Trc

70

—

period

Active to Precharge command

t RAS

period

Tras

50

120000

Active command to column

t RCD

Trcd

20

—

command (same bank)

Precharge to active command

t RP

Trp

20

—

period

Write recovery or data-in to

t DPL

Tdpl

10

—

precharge lead time

Active (a) to Active (b) command tRRD

Trrd

20

—

period

Transition time (rise and fall)

tT

Refresh period

t REF

1

5

—

64

Unit Notes

ns 1

ns

ns 1

ns 1

ns 1, 2

ns

ns 1, 2

ns 1, 2, 3

ns 1, 4

ns 1, 5, 6

ns 1

ns 1, 5

ns 1

ns 1

ns 1

ns 1

ns 1

ns 1

ns

ms

12

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