Austin Semiconductor, Inc.
SSRAM
AS5SS256K36 &
AS5SS256K36A
IDD OPERATING CONDITIONS AND MAXIMUM LIMITS
(-55oC to +125oC or -40oC to +85oC)
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CAPACITANCE
DESCRIPTION
Control Input Capacitance
Input/Output Capacitance (DQ)
Address Capacitance
Clock Capacitance
CONDITIONS
TA = 25oC; f = 1MHz;
VDD = 3.3V
SYM
CI
CO
CA
CCK
MAX
4
5
3.5
3.5
UNITS
pF
pF
pF
pF
NOTES
4
4
4
4
NOTES:
1. I is specified with no output current and increases with faster cycle times. I Q increases with faster cycle times and
DD
DD
greater output loading.
2. “Device deselected” means device is in power-down mode as defined in the truth table. “Device selected” means device
is active (not in power-down mode).
3. A typical value is measured at 3.3V, 25oC and 15ns cycle time.
4. This parameter is sampled.
AS5SS256K36 &
AS5SS256K36A
Rev. 3.5 2/03
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
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