PDM41258LA7SOTY Просмотр технического описания (PDF) - Paradigm Technology
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PDM41258LA7SOTY Datasheet PDF : 8 Pages
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Read Cycle No. 1(1)
t RC
ADDR
DOUT
tAA
t OH
PREVIOUS DATA VALID
DATA VALID
Read Cycle No. 2(2)
ADDR
CE
DOUT
tRC
tAA
tACE
tLZCE
tLZOE
tAOE
tHZCE
tHZOE
DATA VALID
PDM41258
1
2
3
4
5
6
7
AC Electrical Characteristics
8
Description
-7(6)
-8(6)
-10(6)
-12
-15
READ Cycle
READ cycle time
Address access time
Chip enable access time
Output hold from address change
Chip enable to output in low Z(3, 4, 5)
Chip disable to output in high Z(3, 4, 5)
Chip enable to power up time(4)
Chip disable to power down time(4)
Sym
tRC
Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Units
7
8
10
12
15
ns
9
tAA
7
8
10
12
15
ns
tACE
tOH
3
7
3
8
10
12
15
ns
3
3
3
10 ns
tLZCE
5
5
5
5
5
ns
tHZCE
5
5
10
10
10
ns
tPU
0
0
0
0
0
11 ns
tPD
7
8
10
12
15
ns
SHADED AREA = PRELIMINARY DATA
Notes referenced are after Data Retention Table.
12
Rev. 2.2 - 4/27/98
5
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