AL1201 Просмотр технического описания (PDF) - Unspecified

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AL1201

Stereo DAC

Unspecified 

System Description

Serial Interface and Timing

The AL1201 receives its 2’s complement

serial data in a standard MSB-first format.

Two bit-rates are allowed for. The 32

bits/frame (FORMAT low) is suitable for use

in systems where a 256Fs master clock is

present. The 24 bits/frame (FORMAT high)

is convenient when interfacing with systems

where a 384Fs clock is present.

The input sample period is defined between

rising edges of wordclock (WDCLK) input.

Nominally, this is a 50% duty-cycle clock at

frequency Fs, but it can be a pulse with

Ts/256 < pulse-width < Ts (255/256);

Ts=1/Fs. Left channel data is presented to

the AL1201 with rising edge of WDCLK, and

right channel data is presented Ts/2

seconds later (when WDCLK falls if 50%

duty cycle).

The serial bits are clocked into the AL1201

input registers on the falling edge of an

internally generated bit clock (rising edge

aligned with rising edge of WDCLK) that

runs at 64Fs when FORMAT is low (32

bits/frame), or 48Fs when FORMAT is high

(24 bits/frame). The input data should be

valid +/-100ns from the falling edge of this

internally generated clock. See timing

diagram next page.

Input Logic Levels

The AL1201 can properly receive input

logical ‘1’ voltages of .55VD. This means the

AL1201 can interface directly with logic

signals supplied from 3.3V systems. No

special interface circuitry is required.

Internal Phase-Locked Loop (PLL)

The AL1201 contains an internal PLL that

locks to the rising edge of WDCLK and

produces all necessary high frequency

clocks and timing signals to operate the

device. This high quality PLL will reject any

high-frequency jitter on the incoming

wordclock (jitter rejection corner approx.

4kHz).

The PLL allows a simplified user interface

and eliminates the need of running high

frequency clocks on PCB traces to the part.

This reduces unwanted RF noise and

coupling problems that can occur when

these clocks are required as input pins for a

device.

Alesis Semiconductor

DS1201-0702

12555 Jefferson Blvd., Suite 285

Los Angeles, CA 90066

Phone (310) 301-0780 Fax (310) 306-1551 www.alesis-semi.com

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