AK4365 Просмотр технического описания (PDF) - Asahi Kasei Microdevices
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AK4365 Datasheet PDF : 38 Pages
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ASAHI KASEI
[AK4365]
SWITCHING CHARACTERISTICS
(Ta=25°C; AVDD, DVDD, PLLVCC = 2.7 ∼ 3.3V: CL = 20pF)
Parameter
Symbol
min
typ
Master Clock Timing
Frequency (EXT= “0”)
(EXT= “1”)
Pulse Width Low (Note 19)
Pulse Width High (Note 19)
AC Pulse Width (Note 23)
fCLK
fCLK
tCLKL
tCLKH
tACW
11.2896
2.048
0.4/fCLK
0.4/fCLK
20
LRCK
Frequency
Duty Cycle: Slave Mode
Master Mode
fs
8
44.1
Duty
45
Duty
50
MCKO Output (PLL mode)
Frequency
Duty Cycle (except fs=32kHz, PS1-0= “00”)
(fs=32kHz, PS1-0= “00”)
fCLKO
dMCK
dMCK
0.256
40
30
Serial Interface Timing (Note 20)
max
19.8
12.288
48
55
12.288
60
70
Units
MHz
MHz
ns
ns
ns
kHz
%
%
MHz
%
%
Slave Mode (SMODE = “H”):
BICK Period
tBCK
312.5
ns
BICK Pulse Width Low
tBCKL
100
ns
Pulse Width High
tBCKH
100
ns
LRCK Edge to BICK “↑” (Note 21)
tLRB
50
ns
BICK “↑” to LRCK Edge (Note 21)
tBLR
50
ns
SDATA Hold Time
tSDH
50
ns
SDATA Setup Time
tSDS
50
ns
Master Mode (SMODE = “L”):
BICK Frequency (BF = “0”)
(BF = “1”)
BICK Duty
BICK “↓” to LRCK
SDATA Hold Time
SDATA Setup Time
fBCK
64fs
fBCK
32fs
dBCK
50
tMBLR
-50
tSDH
50
tSDS
50
Hz
Hz
%
50
ns
ns
ns
Control Interface Timing
CCLK Period
tCCK
200
ns
CCLK Pulse Width Low
tCCKL
80
ns
Pulse Width High
tCCKH
80
ns
CDTI Setup Time
tCDS
40
ns
CDTI Hold Time
tCDH
40
ns
CS “H” Time
tCSW
150
ns
CS “L” Time
tCSW
150
ns
CS “↑” to CCLK “↑”
tCSS
150
ns
CCLK “↑” to CS “↑”
tCSH
50
ns
Reset Timing
RSTN Pulse Width
(Note 22)
tRST
300
ns
Note 19. Except AC coupling.
Note 20. Refer to “Serial Data Interface”.
Note 21. BICK rising edge must not occur at the same time as LRCK edge.
Note 22. The AK4365 can be reset by bringing RSTN= “L” to “H” only upon power up.
Note 23. Pulse width to ground level when MCKI is connected to a capacitor in series and a resistor is connected to ground.
(Refer to Figure 3.)
MS0110-E-01
-9-
2003/10
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