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ADT7316(RevPrN) Просмотр технического описания (PDF) - Analog Devices

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ADT7316 Datasheet PDF : 32 Pages
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PRELIMINARY TECHNICAL DATA
ADT7316/7317/7318
Parameter2
Min
Scale Factor
DAC ERTERNAL
REFERENCE INPUT6
VREF Input Range
VREF Input Range
VREF Input Impedance
1
0.25
37
74
Reference Feedthrough
Channel-toChannel Isolation
ON-CHIP REFERENCE
Reference Voltage6
Temperature Coefficient6
OUTPUT CHARACTERISTICS6
Output Voltage7
0.001
DC Output Impedance
Short Circuit Current
Power Up Time
DIGITAL INPUTS6
Input Current
VIL, Input Low Voltage
VIH, Input High Voltage
Pin Capacitance
SCL, SDA Glitch Rejection
1.89
DIGITAL OUTPUT
Output High Voltage, VOH
2.4
Output Low Voltage, VOL
Output High Current, IOH
Output Capacitance, COUT
ALERT Output Saturation Voltage
I2C TIMING CHARACTERISTICS8,9
Serial Clock Period, t1
2.5
Data In Setup Time to SCL High, t2
Data Out Stable after SCL Low, t3
0
SDA Low Setup Time to SCL Low
(Start Condition), t4
50
SDA High Hold Time after SCL High
(Stop Condition), t5
50
SDA and SCL Fall Time, t6
SPI TIMING CHARACTERISTICS10, 11
CS to SCLK Setup Time, t1
0
SCLK High Pulsewidth, t2
50
SCLK Low Pulse, t3
50
Data Access Time after
SCLK Falling edge, t412
Data Setup Time Prior
to SCLK Rising Edge, t5
20
Data Hold Time after
SCLK Rising Edge, t6
0
CS to SCLK Hold Time, t7
0
CS to DOUT High Impedance, t8
POWER REQUIREMENTS
VDD
2.7
VDD Settling Time
Typ
2.2
4.39
Max
VDD
VDD
45
90
>10
-90
-75
2.25
80
VDD-0.001
0.5
25
16
2.5
5
±1
0.8
0.6
3
10
50
0.4
1
50
0.8
90
35
40
5.5
50
Units
mV/°C
mV/°C
Conditions/Comments
0-VREF Output. TA = -40°C to +125°C
0-2VREF Output. TA = -40°C to +125°C
V
V
k
k
M
dB
dB
V
ppm/°C
V
mA
mA
µs
µs
µA
V
V
V
pF
ns
V
V
mA
pF
V
µs
ns
ns
ns
ns
Buffered Reference Mode
Unbuffered Reference Mode
Unbuffered Reference Mode. 0-2 VREF Output Range.
Unbuffered Reference Mode. 0- VREF Output Range.
Buffered reference mode and Power-Down Mode
Frequency=10KHz
Frequency=10KHz
This is a measure of the minimum and maximum drive
capability of the output amplifier
VDD = +5V
VDD = +3V
Coming out of Power Down Mode. VDD = +5 V
Coming out of Power Down Mode. VDD = +3 V
VIN = 0V to VDD
VDD = +5V±10%
VDD = +3V±10%
All Digital Inputs
Input Filtering Suppresses Noise Spikes of Less than 50
ns
ISOURCE = ISINK = 200 µA
IOL = 3 mA
VOH = 5 V
IOUT = 4 mA
Fast-Mode I2C. See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
ns
See Figure 2
ns
See Figure 2
ns
See Figure 2
ns
See Figure 2
ns
See Figure 2
ns
See Figure 2
ns
See Figure 2
ns
See Figure 2
V
ms
VDD settles to within 10% of it’s final voltage
level.
REV. PrN
–3–

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