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ADP3205

Multiphase IMVP-IV Core Controller for Mobile CPUs

Analog Devices 

Multiphase IMVP-IV

Core Controller for Mobile CPUs

ADP3205

FEATURES

Pin Programmable 1-, 2-, or 3-Phase Operation

Excellent Static and Dynamic Current Sharing

Superior Load Transient Response when Used with

ADOPT™ Optimal Positioning Technology

Noise-Blanking for Speed and Stability

Synchronous Rectification Control for Optimized Light

Load Efficiency

Soft DAC Output Voltage Transition for VID Change

Cycle-by-Cycle Current Limiting

Latched or Hiccup Current Overload Protection

Masked Power Good during Output Voltage Transients

Soft Start-Up without Power-On In-Rush Current Surge

2-Level Overvoltage and Reverse-Voltage Protection

APPLICATIONS

IMVP-IV CPU Core DC-to-DC Converters

Programmable Output Power Supplies

GENERAL DESCRIPTION

The ADP3205 is a 1-, 2-, or 3-phase hysteretic peak current mode

dc-to-dc buck converter controller dedicated to powering a mobile

processor’s core. The chip optimized low voltage design runs from

the 3.3 V system supply. The chip contains a precision 6-bit DAC

whose nominal output voltage is set by VID code. The ADP3205

features high speed operation to allow a minimized inductor size

that results in the fastest possible change of current to the output.

To further minimize the number of output capacitors, the con-

verter features active voltage positioning enhanced with ADOPT

optimal compensation to ensure a superior load transient response.

The output signals interface with ADP3415 MOSFET drivers,

which that are optimized for high speed and high efficiency. The

ADP3205 is capable of providing synchronous rectification control

to extend battery lifetime in light load conditions.

The ADP3205 is specified over the extended commercial temperature

range of 0°C to 100°C and is available in a 40-lead LFCSP package.

FUNCTIONAL BLOCK DIAGRAM

REV. 0

DRV3 DRVLSD3

39

38

DRV2 DRVLSD2

37

36

DRV1 DRVLSD1

35

34

ADP3205

TSYNC 40

PSI

HYSSET

HYS/CLIM

CONTROL

AND

CS MUX/

PHASE CONTROL

CLIM/ZCS

CMP

CORE

CMP

VDACREF CURRENT

HYSTERESIS SET

AND

SENSE

MUX

CLIM SET

VBG

DPSLP

VREF

BOOTSET

DPRSET

DPRSLP

VID5

VID4

VID3

VID2

VID1

VID0

PWRGD

CLKEN

TPWRGD

DPWRGD

SS 19

VREF

DRVCTRL

VBG

BOOT

REF

MUX

DAC

RES

NETWORK

VREF VBG

PRWGD

DELAY

BOOT

PRWGD

MASKING

MASK

PWRGD

COREGD

LATCH

EOFSS

SS/LATCH-OFF

TIMER

DRVCTRL

ALARM

LATCHEN

SD

VCC 22

GND

UVLO CMP

BIAS ENABLER

ALARM RST

BAND GAP

AND

REF AMP

VREF

VBG

RST

DPSHIFT

SET

CORE ABOVE CMP

CORE BELOW CMP

DVP CMP

OVP

LATCH

VOV

RVP

LATCH

RVP CMP

VRV

33 CS3

CS2

CS1

CS+

CS–

RAMP

REG

DPSHIFT

DACREF

DACREFFB

COREFB

CLAMP

Information furnished by Analog Devices is believed to be accurate and

reliable. However, no responsibility is assumed by Analog Devices for its

use, nor for any infringements of patents or other rights of third parties that

may result from its use. No license is granted by implication or otherwise

under any patent or patent rights of Analog Devices. Trademarks and

registered trademarks are the property of their respective companies.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781/329-4700

www.analog.com

Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved.

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