ADM3493ARZ1 Просмотр технического описания (PDF) - Analog Devices
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ADM3493ARZ1 Datasheet PDF : 12 Pages
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ADM3493
TIMING SPECIFICATIONS
VCC = 3.3 V, TA = 25°C, unless otherwise noted.
Table 2.
Parameter
Min
DRIVER
Differential Output Delay, tDD
600
Differential Output Transition Time, tTD
400
Propagation Delay, Low-to-High Level, tPLH 700
Propagation Delay, High-to-Low Level, tPHL 700
|tPLH – tPHL| Propagation Delay Skew1, tPDS
DRIVER OUTPUT ENABLE/DISABLE TIMES
Output Enable Time to Low Level, tPZL
Output Enable Time to High Level, tPZH
Output Disable Time from High Level, tPHZ
Output Disable Time from Low Level, tPLZ
Output Enable Time from Shutdown to
Low Level, tPSL
Output Enable Time from Shutdown to
High Level, tPSH
RECEIVER
Time to Shutdown2, tSHDN
80
Propagation Delay, Low-to-High Level, tRPLH 25
Propagation Delay, High-to-Low Level, tRPHL 25
|tPLH – tPHL| Propagation Delay Skew, tRPDS
RECEIVER OUTPUT ENABLE/DISABLE TIMES
Output Enable Time to Low Level, tPRZL
Output Enable Time to High Level, tPRZH
Output Disable Time from High Level, tPRHZ
Output Disable Time from Low Level, tPRLZ
Output Enable Time from Shutdown to
Low Level, tPRSL
Output Enable Time from Shutdown to
High Level, tPRSH
Typ
900
700
1000
1000
100
900
600
50
50
1.9
2.2
Max
1400
1200
1500
1500
1300
800
80
80
2.7
3.0
Units Test Conditions/Comments
ns
RL = 60 Ω (see Figure 6 and Figure 12)
ns
RL = 60 Ω (see Figure 6 and Figure 12)
ns
RL = 27 Ω (see Figure 7 and Figure 13)
ns
RL = 27 Ω (see Figure 7 and Figure 13)
ns
RL = 27 Ω (see Figure 7 and Figure 13)
ns
RL = 110 Ω (see Figure 9 and Figure 15)
ns
RL = 110 Ω (see Figure 8 and Figure 14)
ns
RL = 110 Ω (see Figure 8 and Figure 14)
ns
RL = 110 Ω (see Figure 9 and Figure 15)
μs
RL = 110 Ω (see Figure 9 and Figure 15)
μs
RL = 110 Ω (see Figure 8 and Figure 14)
190
300
ns
75
180
ns
VID = 0 V to 3.0 V, CL = 15 pF (see Figure 10
and Figure 16)
75
180
ns
VID = 0 V to 3.0 V, CL = 15 pF (see Figure 10
and Figure 16)
50
ns
VID = 0 V to 3.0 V, CL = 15 pF (see Figure 10
and Figure 16)
25
50
ns
CL = 15 pF (see Figure 11 and Figure 17)
25
50
ns
CL = 15 pF (see Figure 11 and Figure 17)
25
45
ns
CL = 15 pF (see Figure 11 and Figure 17)
25
45
ns
CL = 15 pF (see Figure 11 and Figure 17)
720
1400
ns
CL = 15 pF (see Figure 11 and Figure 17)
720
1400
ns
CL = 15 pF (see Figure 11 and Figure 17)
1 Measured on |tPLH (A) − tPHL (A)| and |tPLH (B) − tPHL (B)|.
2 The transceivers are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 80 ns, the parts are guaranteed not to enter
shutdown. If the inputs are in this state for at least 300 ns, the parts are guaranteed to enter shutdown.
Rev. 0 | Page 4 of 12
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