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ADM1070ART

–48 V Hot Swap Controller

Analog Devices 

ADM1070

FUNCTIONAL DESCRIPTION

HOT CIRCUIT INSERTION

Inserting circuit boards into a live –48 V backplane can cause large

transient currents to be drawn as the board capacitance charges up.

These transient currents can cause glitches on the system power

supply and can permanently damage components on the board.

The ADM1070 is designed to control the manner in which a

board’s supply voltage is applied so that harmful transient currents

do not occur and the board can be safely inserted or removed from

a live backplane. Undervoltage, overvoltage, and overcurrent pro-

tection are other features of the part. The ADM1070 ensures that

the input voltage is stable and within tolerance before being applied

to the dc-to-dc converter, which generates the low voltage levels

required to power the on-board logic. One such converter is the

Artesyn EXQ50. Go to www.artesyn.com for more information.

0V

LIVE

BACKPLANE

–48V

PLUG-IN BOARD

ARTESYN

EXQ50

VIN+

R1

ADM1070

R2

RSENSE FET

CLOAD

VOUT+

VOUT–

TRIM

VIN–

Figure 1. Topology

INITIAL STARTUP

The ADM1070 hot swap controller normally resides on a remov-

able circuit board and controls the manner in which power is

applied to the board upon connection. This is achieved using a

FET, Q1, in the power path. By controlling the gate voltage of

the FET, the surge of current to charge load capacitance can be

limited to a safe value when the board makes connection. Note

that the ADM1070 can also reside on the backplane itself, and

perform the same function from there.

0V

RDROP 16k⍀

CLOAD

VOUT

R1

LIVE

BACKPLANE

R2

VIN

ADM1070 GATE

UV/OV

SENSE

TMER

VEE

Q1

RSENSE

–48V

Figure 2. Circuit Board Connection

Figure 2 shows how a plug-in module containing the ADM1070

makes connection to the backplane supply. When the board is

inserted, the –48 V and 0 V lines connect. This powers up the

device with the voltage on VIN exceeding VLKO.

When the voltage at the UV/OV Pin exceeds undervoltage rising

threshold (VUVR) of 0.91 V, it is now inside the operating volt-

age window. It must stay inside this window for the duration of

the power-on reset delay time, tPOR, which is dependent on the

value of CT.

When the device detects that the supply voltage is valid, it ramps

up the gate voltage until the FET turns on and the load current

increases. The ADM1070 monitors the level of the current flowing

through the FET by sensing the voltage across the external

sense resistor, RSENSE. When the sense voltage reaches 100 mV,

the GATE Pin is actively controlled, limiting the load current.

In this way, the maximum current permitted to flow through the

load is set by the choice of RSENSE.

If a change in the level of the supply voltage causes UV/OV to

fall below the undervoltage falling threshold of VUVF, or rise

above the overvoltage rising threshold of VOVR, then the gate

drive will be disabled.

BOARD REMOVAL

If the board is removed from a card cage, the voltage at the

UV/OV pin falls to zero (i.e., outside operating range) and the

gate drive is deasserted, turning off the FET.

CONTROLLING THE CURRENT

The ADM1070 features a current limiting function that protects

against short circuits or excessive supply currents. The flow of

current through the load is monitored by measuring the voltage

across the sense resistor, which is connected between the SENSE

and VEE Pins. There are three different types of protection offered:

1. If the voltage across the sense resistor exceeds the circuit

breaker limit voltage of 88 mV (rising) for the current limit

on time (tLIMITON), then a current fault has occurred and the

PWM cycle begins. The FET current is linearly controlled at

a maximum of 100 mV/RSENSE (via the gate drive) during

tLIMITON (see next section). The gate is then disabled for the

duration tOFF. This PWM ratio, which will always be 3%, is

given by tON/tOFF.

A unique feature of the ADM1070 is the limited consecutive

retry function. An internal fault counter keeps track of the

number of successive PWM cycles that occur. The fault

counter is incremented after every fault is detected. If the

ADM1070 detects seven consecutive current faults, it is appar-

ent that the fault is not a temporary one and the device

latches itself off. The fault counter is cleared if a new tON

timeout does not occur within 2 ϫ tOFF of the previous

tLIMITON timeout.

REV. 0

–9–

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