ADM1067ASUZ(RevE) Просмотр технического описания (PDF) - Analog Devices

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ADM1067ASUZ
(Rev.:RevE)

Super Sequencer with Open-Loop Margining DACs

Analog Devices 

Data Sheet

ADM1067

SPECIFICATIONS

VH = 3.0 V to 14.4 V1, VPx = 3.0 V to 6.0 V1, TA = −40°C to +85°C, unless otherwise noted.

Table 1.

Parameter

POWER SUPPLY ARBITRATION

VH, VPx

VPx

VH

VDDCAP

CVDDCAP

POWER SUPPLY

Supply Current, IVH, IVPx

Additional Currents

All PDO FET Drivers On

Current Available from VDDCAP

DACs Supply Current

ADC Supply Current

EEPROM Erase Current

SUPPLY FAULT DETECTORS

VH Pin

Input Impedance

Input Attenuator Error

Detection Ranges

High Range

Midrange

VPx Pins

Input Impedance

Input Attenuator Error

Detection Ranges

Midrange

Low Range

Ultralow Range

VXx Pins

Input Impedance

Detection Ranges

Ultralow Range

Absolute Accuracy

Threshold Resolution

Digital Glitch Filter

BUFFERED VOLTAGE OUTPUT DACs

Resolution

Code 0x80 Output Voltage

Range 1

Range 2

Range 3

Range 4

Output Voltage Range

LSB Step Size

Min Typ

3.0

2.7 4.75

10

4.2

1

2.2

1

10

Max Unit Test Conditions/Comments

V

6.0 V

14.4 V

5.4 V

μF

Minimum supply required on one of VH, VPx

Maximum VDDCAP = 5.1 V, typical

VDDCAP = 4.75 V

Regulated LDO output

Minimum recommended decoupling capacitance

6

mA VDDCAP = 4.75 V, PDO1 to PDO10 off, DACs off, ADC off

mA VDDCAP = 4.75 V, PDO1 to PDO6 loaded with 1 μA each,

PDO7 to PDO10 off

2

mA Maximum additional load that can be drawn from all PDO

pull-ups to VDDCAP

mA Six DACs on with 100 μA maximum load on each

mA Running round-robin loop

mA 1 ms duration only, VDDCAP = 3 V

52

±0.05

kΩ

% Midrange and high range

6

14.4 V

2.5

6

V

52

±0.05

kΩ

% Low range and midrange

2.5

1.25

0.573

6

V

3

V

1.375 V

No input attenuation error

1

MΩ

0.573

8

0

100

1.375 V

±1 %

Bits

μs

μs

No input attenuation error

VREF error + DAC nonlinearity + comparator offset error +

input attenuation error

Minimum programmable filter length

Maximum programmable filter length

8

Bits

0.592 0.6

0.603 V

0.796 0.8

0.803 V

0.997 1

1.003 V

1.247 1.25 1.253 V

601.25

mV

2.36

mV

Six DACs are individually selectable for centering on one of

four output voltage ranges

Same range, independent of center point

Rev. E | Page 5 of 31

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