ADM1067(RevE) Просмотр технического описания (PDF) - Analog Devices

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ADM1067
(Rev.:RevE)

Super Sequencer with Open-Loop Margining DACs

Analog Devices 

ADM1067

Data Sheet

Pin No.

40-Lead 48-Lead

LFCSP TQFP

38

45

39

46

40

47

N/A2

Mnemonic

MDN

VDDCAP

GND1

EPAD

Description

Digital Input. Forces DACs to their highest value, causing the voltage at the feedback node to

rise. This is compensated for by a decrease in the supply output voltage, thus margining down.

Device Supply Voltage. Linearly regulated from the highest of the VPx, VH pins to a typical of 4.75 V.

Note that the capacitor must be connected between this pin and GND. A 10 μF capacitor is

recommended for this purpose.

Supply Ground.

Exposed Pad. The LFCSP has an exposed pad on the bottom. This pad is a no connect (NC). If possible,

this pad should be soldered to the board for improved mechanical stability.

1 In a typical application, all ground pins are connected together.

2 N/A is not applicable

Rev. E | Page 10 of 31

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