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AD9637BCPZ-40 Просмотр технического описания (PDF) - Analog Devices

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AD9637BCPZ-40 Datasheet PDF : 40 Pages
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AD9637
ABSOLUTE MAXIMUM RATINGS
Table 6.
Parameter
Electrical
AVDD to AGND
DRVDD to AGND
Digital Outputs
(D± x, DCO+, DCO−, FCO+, FCO−) to
AGND
CLK+, CLK− to AGND
VIN+ x, VIN− x to AGND
SCLK/DTP, SDIO/DFS, CSB to AGND
SYNC, PDWN to AGND
RBIAS to AGND
VREF, SENSE to AGND
Environmental
Operating Temperature Range (Ambient)
Maximum Junction Temperature
Lead Temperature (Soldering, 10 sec)
Storage Temperature Range (Ambient)
Rating
−0.3 V to +2.0 V
−0.3 V to +2.0 V
−0.3 V to +2.0 V
−0.3 V to +2.0 V
−0.3 V to +2.0 V
−0.3 V to +2.0 V
−0.3 V to +2.0 V
−0.3 V to +2.0 V
−0.3 V to +2.0 V
−40°C to +85°C
150°C
300°C
−65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Data Sheet
THERMAL CHARACTERISTICS
The exposed paddle must be soldered to the ground plane for
the LFCSP package. Soldering the exposed paddle to the printed
circuit board (PCB) increases the reliability of the solder joints
and maximizes the thermal capability of the package.
Table 7. Thermal Resistance
Package
Type
Airflow
Velocity
(m/sec)
θ 1, 2
JA
64-Lead
0
22.3
LFCSP
1.0
19.5
9 mm × 9 mm
(CP-64-4)
2.5
17.5
θ 1, 3
JC
1.4
N/A
N/A
θ 1, 4
JB
N/A
11.8
N/A
Ψ 1, 2
JT
0.1
0.2
0.2
Unit
°C/W
°C/W
°C/W
1 Per JEDEC 51-7, plus JEDEC 25-5 2S2P test board.
2 Per JEDEC JESD51-2 (still air) or JEDEC JESD51-6 (moving air).
3 Per MIL-Std 883, Method 1012.1.
4 Per JEDEC JESD51-8 (still air).
Typical θJA is specified for a 4-layer PCB with a solid ground
plane. As shown Table 7, airflow improves heat dissipation,
which reduces θJA. In addition, metal in direct contact with the
package leads from metal traces, through holes, ground, and
power planes reduces θJA.
ESD CAUTION
Rev. A | Page 8 of 40

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