datasheetbank_Logo
Технический паспорт Поисковая и бесплатно техническое описание Скачать

AD9280ARSRL Просмотр технического описания (PDF) - Analog Devices

Номер в каталоге
Компоненты Описание
производитель
AD9280ARSRL Datasheet PDF : 24 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
AD9280
Parameter
DIGITAL INPUTS
High Input Voltage
Low Input Voltage
DIGITAL OUTPUTS
High-Z Leakage
Data Valid Delay
Data Enable Delay
Data High-Z Delay
LOGIC OUTPUT (with DRVDD = 3 V)
High Level Output Voltage (IOH = 50 µA)
High Level Output Voltage (IOH = 0.5 mA)
Low Level Output Voltage (IOL = 1.6 mA)
Low Level Output Voltage (IOL = 50 µA)
LOGIC OUTPUT (with DRVDD = 5 V)
High Level Output Voltage (IOH = 50 µA)
High Level Output Voltage (IOH = 0.5 mA)
Low Level Output Voltage (IOL = 1.6 mA)
Low Level Output Voltage (IOL = 50 µA)
CLOCKING
Clock Pulsewidth High
Clock Pulsewidth Low
Pipeline Latency
CLAMP
Clamp Error Voltage
Clamp Pulsewidth
NOTES
1See Figures 1a and 1b.
Specifications subject to change without notice.
Symbol Min Typ Max Units Condition
VIH
2.4
VIL
V
0.3 V
IOZ
–10
+10 µA
Output = GND to VDD
tOD
25
ns
CL = 20 pF
tDEN
25
ns
tDHZ
13
ns
VOH
+2.95
VOH
+2.80
VOL
VOL
V
V
+0.4 V
+0.05 V
VOH
+4.5
VOH
+2.4
VOL
VOL
V
V
+0.4 V
+0.1 V
tCH
14.7
tCL
14.7
3
ns
ns
Cycles
EOC
± 60 ± 80 mV
CLAMPIN = +0.5 V to +2.0 V,
RIN = 10
tCPW
2
µs
CIN = 1 µF (Period = 63.5 µs)
10k
REFTS
10k
REFBS
MODE
AVDD
AD9280
0.4 ؋ VDD
REFTS
REFTF
REFBF
REFBS
MODE
a.
Figure 1. Equivalent Input Load
AD9280
4.2k
b.
REV. E
–3–

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]