AD8332ARUZ-R7 Просмотр технического описания (PDF) - Analog Devices

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производитель

AD8332ARUZ-R7

Ultralow Noise VGAs with Preamplifier and Programmable RIN

Analog Devices 

AD8331/AD8332/AD8334

Parameter

ENABLE INTERFACE

(PIN ENB, PIN ENBL, PIN ENBV)

Logic Level to Enable Power

Logic Level to Disable Power

Input Resistance

Power-Up Response Time

HILO GAIN RANGE INTERFACE (PIN HILO)

Logic Level to Select HI Gain Range

Logic Level to Select LO Gain Range

Input Resistance

OUTPUT CLAMP INTERFACE

(PIN RCLMP; HI OR LO GAIN)

Accuracy

HILO = LO

HILO = HI

MODE INTERFACE (PIN MODE)

Logic Level for Positive Gain Slope

Logic Level for Negative Gain Slope

Input Resistance

POWER SUPPLY (PIN VPS1, PIN VPS2,

PIN VPSV, PIN VPSL, PIN VPOS)

Supply Voltage

Quiescent Current per Channel

AD8331

AD8332, AD8334

Power Dissipation per channel

AD8331

AD8332, AD8334

Power-Down Current

AD8332 (VGA and LNA Disabled)

AD8331 (VGA and LNA Disabled)

LNA Current

AD8331 (ENBL)

AD8332, AD8334 (ENBL)

VGA Current

AD8331 (ENBV)

AD8332, AD8334 (ENBV)

PSRR

Conditions

Pin ENB

Pin ENBL

Pin ENBV

VINH = 30 mV p-p

VINH = 150 mV p-p

RCLMP = 2.74 kΩ, VOUT = 1 V p-p (clamped)

RCLMP = 2.21 kΩ, VOUT = 1 V p-p (clamped)

No signal

Each channel

Each channel

VGAIN = 0 V, f = 100 kHz

1 All dBm values are referred to 50 Ω.

2 The absolute gain refers to the theoretical gain expression in Equation 1.

3 Best-fit to linear-in-dB curve.

4 The current is limited to ±1 mA typical.

Min Typ

2.25

0

25

40

70

300

4

2.25

0

50

±50

±75

0

2.25

200

4.5 5.0

20 25

20 29

125

145

50 300

50 240

7.5 11

7.5 12

7.5 14

7.5 17

−68

Max Unit

5

V

1.0 V

kΩ

kΩ

kΩ

μs

ms

5

V

1.0 V

kΩ

mV

mV

1.0 V

5

V

kΩ

5.5 V

mA

mA

mW

mW

600 μA

400 μA

15 mA

15 mA

20 mA

20 mA

dB

Rev. E | Page 6 of 40

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