AD7923(Rev0) Просмотр технического описания (PDF) - Analog Devices
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AD7923 Datasheet PDF : 20 Pages
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AD7923–SPECIFICATIONS (AVDD = VDRIVE = 2.7 V to 5.25 V, REFIN = 2.5 V, fSCLK = 20 MHz, TA = TMIN to TMAX,
unless otherwise noted.)
Parameter
DYNAMIC PERFORMANCE
Signal-to-(Noise + Distortion) (SINAD)2
Signal-to-Noise Ratio (SNR)2
Total Harmonic Distortion (THD)2
Peak Harmonic or Spurious Noise
(SFDR)2
Intermodulation Distortion (IMD)2
Second Order Terms
Third Order Terms
Aperture Delay
Aperture Jitter
Channel-to-Channel Isolation2
Full Power Bandwidth
DC ACCURACY2
Resolution
Integral Nonlinearity
Differential Nonlinearity
0 V to REFIN Input Range
Offset Error
Offset Error Match
Gain Error
Gain Error Match
0 V to 2 ¥ REFIN Input Range
Positive Gain Error
Positive Gain Error Match
Zero Code Error
Zero Code Error Match
Negative Gain Error
Negative Gain Error Match
ANALOG INPUT
Input Voltage Range
DC Leakage Current
Input Capacitance
REFERENCE INPUT
REFIN Input Voltage
DC Leakage Current
REFIN Input Impedance
LOGIC INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IIN
Input Capacitance, CIN3
LOGIC OUTPUTS
Output High Voltage, VOH
Output Low Voltage, VOL
Floating-State Leakage Current
Floating-State Output Capacitance3
Output Coding
B Version1 Unit
70
dB min
69
dB min
70
dB min
–77
dB max
–73
dB max
–78
dB max
–76
dB max
–90
dB typ
–90
dB typ
10
ns typ
50
ps typ
–85
dB typ
8.2
MHz typ
1.6
MHz typ
12
±1
–0.9/+1.5
±8
± 0.5
± 1.5
± 0.5
± 1.5
± 0.5
±8
± 0.5
±1
± 0.5
Bits
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
0 to REFIN
0 to 2 ¥ REFIN
±1
20
V
V
mA max
pF typ
2.5
V
±1
mA max
36
kW typ
0.7 ¥ VDRIVE
0.3 ¥ VDRIVE
±1
10
V min
V max
mA max
pF max
VDRIVE – 0.2
0.4
V min
V max
±1
mA max
10
pF max
Straight (Natural) Binary
Twos Complement
Test Conditions/Comments
fIN = 50 kHz Sine Wave, fSCLK = 20 MHz
@5V
@ 3 V Typically 70 dB
@ 5 V Typically –84 dB
@ 3 V Typically –77 dB
@ 5 V Typically –86 dB
@ 3 V Typically –80 dB
fa = 40.1 kHz, fb = 41.5 kHz
fIN = 400 kHz
@ 3 dB
@ 0.1 dB
Guaranteed No Missed Codes to 12 Bits.
Straight Binary Output Coding
Typically ± 0.5 LSB
–REFIN to +REFIN Biased about REFIN with
Twos Complement Output Coding
Typically ± 0.8 LSB
RANGE Bit Set to 1
RANGE Bit Set to 0, AVDD/VDRIVE = 4.75 V to 5.25 V
± 1% Specified Performance
fSAMPLE = 200 kSPS
Typically 10 nA, VIN = 0 V or VDRIVE
ISOURCE = 200 mA, AVDD = 2.7 V to 5.25 V
ISINK = 200 mA
Coding Bit Set to 1
Coding Bit Set to 0
–2–
REV. 0
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