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AD7870A

LC2MOS Complete, 12-Bit, 100 kHz , Sampling ADC

Analog Devices 

AD7870A

CONVERTER DETAILS

The AD7870A is a complete 12-bit A/D converter, requiring no

external components apart from power supply decoupling ca-

pacitors. It is comprised of a 12-bit successive approximation

ADC based on a fast settling voltage-output DAC, a high speed

comparator and SAR, a track/hold amplifier, a 3 V buried Zener

reference, a clock oscillator and control logic.

INTERNAL REFERENCE

The AD7870A has an on-chip temperature compensated buried

Zener reference that is factory trimmed to 3 V ± 10 mV. In-

ternally it provides both the DAC reference and the dc bias re-

quired for bipolar operation. The reference output is available

(REF OUT) and capable of providing up to 500 µA to an ex-

ternal load.

The maximum recommended capacitance on REF OUT for

normal operation is 50 pF. If the reference is required for use

external to the AD7870A, it should be decoupled with a 200 Ω

resistor in series with a parallel combination of a 10 µF tantalum

capacitor and a 0.1 µF ceramic capacitor. These decoupling

components are required to remove voltage spikes caused by the

AD7870A’s internal operation.

Figure 4. Analog Input

ANALOG INPUT

Figure 4 shows the AD7870A analog input. The analog input

range is ± 3 V into an input resistance of typically 15 kΩ. The

designed code transitions occur midway between successive

integer LSB values (i.e., 1/2 LSB, 3/2 LSBs, 5/2 LSBs . . .

FS 3/2 LSBs). The output code is twos complement binary with

1 LSB = FS/4096 = 6 V/4096 = 1.46 mV. The ideal input/out-

put transfer function is shown in Figure 5.

Figure 3. Reference Circuit

TRACK-AND-HOLD AMPLIFIER

The track-and-hold amplifier on the analog input of the AD7870A

allows the ADC to accurately convert an input sine wave of 6 V

peak-peak amplitude to 12-bit accuracy. The input bandwidth

of the track/hold amplifier is much greater than the Nyquist rate

of the ADC even when the ADC is operated at its maximum

throughput rate. The 0.1 dB cutoff frequency occurs typically at

500 kHz. The track/hold amplifier acquires an input signal to

12-bit accuracy in less than 2 µs. The overall throughput rate is

equal to the conversion time plus the track/hold amplifier ac-

quisition time. For a 2.5 MHz input clock the throughput rate

is 10 µs max.

The operation of the track/hold is essentially transparent to the

user. The track/hold amplifier goes from its tracking mode to its

hold mode at the start of conversion. The track-to-hold transi-

tion occurs on the falling edge of CONVST.

Figure 5. Bipolar Input/Output Transfer Function

BIPOLAR OFFSET AND FULL SCALE ADJUSTMENT

In most digital signal processing (DSP) applications, offset and

full-scale errors have little or no effect on system performance.

Offset error can always be eliminated in the analog domain by

ac coupling. Full-scale error effect is linear and does not cause

problems as long as the input signal is within the full dynamic

range of the ADC. Some applications will require that the input

signal span the full analog input dynamic range. In such applica-

tions, offset and full-scale error will have to be adjusted to zero.

Where adjustment is required, offset error must be adjusted be-

fore full-scale error. This is achieved by trimming the offset of

the op amp driving the analog input of the AD7870A while the

input voltage is 1/2 LSB below ground. The trim procedure is as

follows: apply a voltage of 0.73 mV (–1/2 LSB) at V1 in Figure 6

and adjust the op amp offset voltage until the ADC output code

flickers between 1111 1111 1111 and 0000 0000 0000. Gain

error can be adjusted at either the first code transition (ADC

negative full scale) or the last code transition (ADC positive full

scale). The trim procedures for both cases are as follows (see

Figure 6).

–6–

REV. 0

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