AD7490BRU(RevA) Просмотр технического описания (PDF) - Analog Devices

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AD7490BRU
(Rev.:RevA)

16-Channel, 1 MSPS, 12-Bit ADC with Sequencer in 28-Lead TSSOP

Analog Devices 

AD7490

Parameter

B Version2 Unit

Test Conditions/Comments

CONVERSION RATE

Conversion Time

Track-and-Hold Acquisition Time3

Throughput Rate

800

ns max

16 SCLK Cycles, SCLK = 20 MHz

300

ns max

Sine Wave Input

300

ns max

Full-Scale Step Input

1

MSPS max @ 5 V (See Serial Interface section.)

POWER REQUIREMENTS

VDD

VDRIVE

IDD5

Normal Mode (Static)

Normal Mode (Operational)

(fS = Max Throughput)

Auto Standby Mode

Auto Shutdown Mode

Full Shutdown Mode

Power Dissipation5

Normal Mode (Operational)

Auto Standby Mode (Static)

Auto Shutdown Mode (Static)

Full Shutdown Mode

2.7/5.25

2.7/5.25

600

2.5

1.8

1.55

92

960

0.5

0.5

12.5

5.4

460

276

2.5

1.5

2.5

1.5

V min/max

V min/max

µA typ

mA max

mA max

mA typ

µA max

µA typ

µA max

µA max

mW max

mW max

µW max

µW max

µW max

µW max

µW max

µW max

Digital I/Ps = 0 V or VDRIVE

VDD = 2.7 V to 5.25 V, SCLK On or Off

VDD = 4.75 V to 5.25 V, fSCLK = 20 MHz

VDD = 2.7 V to 3.6 V, fSCLK = 20 MHz

fSAMPLE = 500 kSPS

Static

fSAMPLE = 250 kSPS

Static

SCLK On or Off (20 nA typ)

VDD = 5 V, fSCLK = 20 MHz

VDD = 3 V, fSCLK = 20 MHz

VDD = 5 V

VDD = 3 V

VDD = 5 V

VDD = 3 V

VDD = 5 V

VDD = 3 V

NOTES

1Specifications apply for fSCLK up to 20 MHz. However, for serial interfacing requirements, see Timing Specifications.

2Temperature Ranges (B Version): –40°C to +85°C.

3See Terminology section.

4Sample tested at 25°C to ensure compliance.

5See Power Versus Throughput Rate section.

Specifications subject to change without notice.

REV. A

–3–

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