AD7490BRU(RevA) Просмотр технического описания (PDF) - Analog Devices
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AD7490BRU Datasheet PDF : 24 Pages
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AD7490
the on resistance of a switch (track and hold switch) and also includes
the on resistance of the input multiplexer. The total resistance is
typically about 400 Ω. The capacitor C2 is the ADC sampling
capacitor and typically has a capacitance of 30 pF. For ac appli-
cations, removing high frequency components from the analog
input signal is recommended by use of an RC low-pass filter on
the relevant analog input pin. In applications where harmonic distor-
tion and signal-to-noise ratio are critical, the analog input should
be driven from a low impedance source. Large source impedances
will significantly affect the ac performance of the ADC. This
may necessitate the use of an input buffer amplifier. The choice
of the op amp will be a function of the particular application.
When no amplifier is used to drive the analog input, the source
impedance should be limited to low values. The maximum
source impedance will depend on the amount of total harmonic
distortion (THD) that can be tolerated. The THD will increase as
the source impedance increases, and performance will degrade
(see TPC 5).
ADC TRANSFER FUNCTION
The output coding of the AD7490 is either straight binary or twos
complement depending on the status of the LSB (RANGE Bit) in
the Control Register. The designed code transitions occur midway
between successive LSB values (i.e., 1 LSB, 2 LSBs, and so on).
The LSB size is equal to REFIN/4096. The ideal transfer charac-
teristic for the AD7490 when straight binary coding is selected
is shown in Figure 8.
111…111
111…110
•
•
111…000
•
011…111
•
•
000…010
000…001
000…000
0V 1 LSB
1 LSB ؍VREF/4096
+VREF ؊ 1 LSB
ANALOG INPUT
VREF IS EITHER REFIN OR 2 ؋ REFIN
Figure 8. Straight Binary Transfer Characteristic
011…111
011…110
•
•
000…001
000…000
111…111
•
•
100…010
100…001
100…000
1 LSB ؍2 ؋ VREFր4096
–VREF ؉ 1 LSB
+VREF ؊ 1 LSB
VREF ؊ 1 LSB
ANALOG INPUT
Figure 9. Twos Complement Transfer Characteristic
with REFIN ± REFIN Input Range
Handling Bipolar Input Signals
Figure 10 shows how useful the combination of the 2 ϫ REFIN
input range and the twos complement output coding scheme is for
handling bipolar input signals. If the bipolar input signal is biased
about REFIN and twos complement output coding is selected,
then REFIN becomes the zero code point, –REFIN is negative
fullscale and +REFIN becomes positive full scale, with a dynamic
range of 2 ϫ REFIN.
TYPICAL CONNECTION DIAGRAM
Figure 11 shows a typical connection diagram for the AD7490. In
this setup, the AGND pin is connected to the analog ground plane
of the system. In Figure 11, REFIN is connected to a decoupled
2.5 V supply from a reference source, the AD780, to provide an
analog input range of 0 V to 2.5 V (if RANGE Bit is 1) or 0 V to
5 V (if RANGE Bit is 0). Although the AD7490 is connected to a
VDD of 5 V, the serial interface is connected to a 3 V micropro-
cessor. The VDRIVE pin of the AD7490 is connected to the same
3 V supply of the microprocessor to allow a 3 V logic interface
(see Digital Inputs section.) The conversion result is output in a
16-bit word. This 16-bit data stream consists of four address bits
indicating which channel the conversion result corresponds to,
followed by the 12 bits of conversion data. For applications where
VDD
VREF
0.1F
R4
V
R3
R2
0V
V
R1
REFIN VDD
VDRIVE
AD7490
TWOS
COMPLEMENT
VIN0
•
•
VIN15
DOUT
DSP/P
+REFIN
؍(2 ؋ REFIN)
REFIN
–REFIN
؍(0V)
R1 ؍R2 ؍R3 ؍R4
Figure 10. Handling Bipolar Signals
011…111
000…000
100…000
REV. A
–13–
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