AD73460(Rev0) Просмотр технического описания (PDF) - Analog Devices
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AD73460 Datasheet PDF : 32 Pages
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AD73460–SPECIFICATIONS (AVDD = 3.0 V to 3.6 V; DVDD = 3.0 V to 3.6 V; DGND = AGND = 0 V,
fMCLK = 16.384 MHz, fSAMP = 64 kHz; TA = TMIN to TMAX, unless otherwise noted.)
Parameter
AD73460B
Min
Typ
Max Unit
Test Conditions/Comments
LOGIC INPUTS
VINH, Input High Voltage
VINL, Input Low Voltage
IIH, Input Current
CIN, Input Capacitance
VDD – 0.8
0
VDD
V
0.8
V
10
µA
10
pF
LOGIC OUTPUTS
VOH, Output High Voltage
VOL, Output Low Voltage
Three-State Leakage Current
VDD – 0.4
0
–10
VDD
V
0.4
V
+10
µA
|IOUT| ≤ 100 µA
|IOUT| ≤ 100 µA
POWER SUPPLIES
AVDD1, AVDD2
3.0
DVDD
3.0
IDD8
3.6
V
3.6
V
See Table I
NOTES
1Operating temperature range is as follows: –20°C to +85°C. Therefore, TMIN = –20°C and TMAX = +85°C.
2Test conditions: Input PGA set for 0 dB gain (unless otherwise noted).
3At input to sigma-delta modulator of ADC.
4Guaranteed by design.
5Overall group delay will be affected by the sample rate and the external digital filtering.
6The ADC’s input impedance is inversely proportional to DMCLK and is approximated by: (4 × 1011)/DMCLK.
7Frequency response of ADC measured with input at audio reference level (the input level that produces an output level of –10 dBm0), with 38 dB preamplifier
bypassed and input gain of 0 dB.
8Test Conditions: no load on digital inputs, analog inputs ac coupled to ground.
Specifications subject to change without notice.
Table I. AFE Section Current Summary (AVDD = DVDD = 3.3 V)
Conditions
Total
Current
(Max)
SE
MCLK
ON
REFCAP Only On
1.0
0
No
REFCAP and
REFOUT Only On 4.5
0
No
All Sections On
26.5
1
Yes
All Sections Off
1.5
0
Yes
All Sections Off
0.1
0
No
The above values are in mA. MCLK = 16.384 MHz; SCLK = 16.384 MHz.
Comments
REFOUT Disabled
REFOUT Enabled
MCLK Active Levels Equal to 0 V and DVDD
Digital Inputs Static and Equal to 0 V or DVDD
–4–
REV. 0
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