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CS4360-BZ Просмотр технического описания (PDF) - Cirrus Logic

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CS4360-BZ Datasheet PDF : 36 Pages
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CS4360
4. REGISTER DESCRIPTIONS
Note: All registers are read/write in Two-Wire mode and write only in SPI, unless otherwise noted.
4.1 Mode Control 1 (address 01h)
7
AMUTE
1
6
DIF2
0
5
DIF1
0
4
DIF0
0
3
DEM1
0
2
DEM0
0
1
FM1
0
0
FM0
0
4.1.1 AUTO-MUTE (AMUTE)
Default = 1
0 - Disabled
1 - Enabled
Function:
The Digital-to-Analog converter output will mute following the reception of 8192 consecutive audio
samples of static 0 or -1. A single sample of non-static data will release the mute. Detection and
muting is done independently for each channel. The quiescent voltage on the output will be retained
and the Mute Control pin will go active during the mute period. The muting function is affected, similar
to volume control changes, by the Soft and Zero Cross bits in the Power and Muting Control register.
4.1.2 DIGITAL INTERFACE FORMAT (DIF)
Default = 000 - Format 0 (Left Justified, up to 24-bit data)
Function:
The required relationship between the Left/Right clock, serial clock and serial data is defined by the
Digital Interface Format and the options are detailed in Figures 17-22.
DIF2
0
0
0
0
1
1
1
1
DIF1
0
0
1
1
0
0
1
1
DIF0
0
1
0
1
0
1
0
1
DESCRIPTION
Left Justified, up to 24-bit data,
I2S, up to 24-bit data
Right Justified, 16-bit data
Right Justified, 24-bit data
Right Justified, 20-bit data
Right Justified, 18-bit data
Reserved
Reserved
Format
0
1
2
3
4
5
Table 1. Digital Interface Formats - Control Port Mode
FIGURE
17
18
19
20
21
22
14
DS517PP1

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