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P89C58UFBB Просмотр технического описания (PDF) - Philips Electronics

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P89C58UFBB Datasheet PDF : 32 Pages
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Philips Semiconductors
80C51 8-bit microcontroller family
4K/8K/16K/32K Flash
Product specification
89C51/89C52/89C54/89C58
Reduced EMI Mode
The AO bit (AUXR.0) in the AUXR register when set disables the
ALE output.
Reduced EMI Mode
AUXR (8EH)
7
6
5
4
3
2
1
0
AO
AUXR.0
AO
Turns off ALE output.
Dual DPTR
The dual DPTR structure (see Figure 13) is a way by which the chip
will specify the address of an external data memory location. There
are two 16-bit DPTR registers that address the external memory,
and a single bit called DPS = AUXR1/bit0 that allows the program
code to switch between them.
New Register Name: AUXR1#
SFR Address: A2H
Reset Value: xxxx00x0B
AUXR1 (A2H)
7
6
5
4
3
2
1
0
GF2
0
DPS
Where:
DPS = AUXR1/bit0 = Switches between DPTR0 and DPTR1.
Select Reg
DPTR0
DPTR1
DPS
0
1
The DPS bit status should be saved by software when switching
between DPTR0 and DPTR1.
The GF0 bit is a general purpose user-defined flag. Note that bit 2 is
not writable and is always read as a zero. This allows the DPS bit to
be quickly toggled simply by executing an INC AUXR1 instruction
without affecting the GF2 bit.
DPS
BIT0
AUXR1
DPH
(83H)
DPL
(82H)
DPTR1
DPTR0
Figure 13.
EXTERNAL
DATA
MEMORY
SU00745A
DPTR Instructions
The instructions that refer to DPTR refer to the data pointer that is
currently selected using the AUXR1/bit 0 register. The six
instructions that use the DPTR are as follows:
INC DPTR
Increments the data pointer by 1
MOV DPTR, #data16 Loads the DPTR with a 16-bit constant
MOV A, @ A+DPTR Move code byte relative to DPTR to ACC
MOVX A, @ DPTR
Move external RAM (16-bit address) to
ACC
MOVX @ DPTR , A
Move ACC to external RAM (16-bit
address)
JMP @ A + DPTR
Jump indirect relative to DPTR
The data pointer can be accessed on a byte-by-byte basis by
specifying the low or high byte in an instruction which accesses the
SFRs. See application note AN458 for more details.
1999 Oct 27
19

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