74VHC257(2004) Просмотр технического описания (PDF) - STMicroelectronics

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74VHC257
(Rev.:2004)

QUAD 2 CHANNEL MULTIPLEXER (3-STATE)

STMicroelectronics 

74VHC257

QUAD 2 CHANNEL MULTIPLEXER (3-STATE)

s HIGH SPEED: tPD = 3.7ns (TYP.) at VCC = 5V

s LOW POWER DISSIPATION:

ICC = 4 µA (MAX.) at TA=25°C

s HIGH NOISE IMMUNITY:

VNIH = VNIL = 28% VCC (MIN.)

s POWER DOWN PROTECTION ON INPUTS

s SYMMETRICAL OUTPUT IMPEDANCE:

|IOH| = IOL = 8mA (MIN)

s BALANCED PROPAGATION DELAYS:

tPLH ≅ tPHL

s OPERATING VOLTAGE RANGE:

VCC(OPR) = 2V to 5.5V

s PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 257

s IMPROVED LATCH-UP IMMUNITY

s LOW NOISE: VOLP = 0.8V (MAX.)

DESCRIPTION

The 74VHC257 is an advanced high-speed

CMOS QUAD 2-CHANNEL MULTIPLEXER

(3-STATE) fabricated with sub-micron silicon gate

and double-layer metal wiring C2MOS technology.

It is composed of four independent 2-channel

multiplexers with common SELECT and ENABLE

(OE) INPUT. The VHC257 is a non-inverting

multiplexer. When the ENABLE INPUT is held

SOP

TSSOP

Table 1: Order Codes

PACKAGE

SOP

TSSOP

T&R

74VHC257MTR

74VHC257TTR

"High", all outputs become in high impedance

state. If SELECT INPUT is held "Low", "A" data is

selected, when SELECT INPUT is "High", "B" data

is chosen.

Power down protection is provided on all inputs

and 0 to 7V can be accepted on inputs with no

regard to the supply voltage. This device can be

used to interface 5V to 3V.

All inputs and outputs are equipped with

protection circuits against static discharge, giving

them 2KV ESD immunity and transient excess

voltage.

Figure 1: Pin Connection And IEC Logic Symbols

November 2004

Rev. 4

1/14

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